dyncall: doc/manual/callconvs/callconv

annotate doc/manual/callconvs/callconv_arm32.tex @ 328:276eb8c87aa0

- review and fixes, cleanup, amendments to calling convention appendix of manual

author	Tassilo Philipp
date	Fri, 22 Nov 2019 23:11:56 +0100
parents	703d102cb580
children	06c9adae114d

rev	line source
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	1 %//////////////////////////////////////////////////////////////////////////////
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	2 %
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	3 % Copyright (c) 2007-2019 Daniel Adler <dadler@uni-goettingen.de>,
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	4 % Tassilo Philipp <tphilipp@potion-studios.com>
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	5 %
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	6 % Permission to use, copy, modify, and distribute this software for any
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	7 % purpose with or without fee is hereby granted, provided that the above
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	8 % copyright notice and this permission notice appear in all copies.
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	9 %
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	10 % THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	11 % WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	12 % MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	13 % ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	14 % WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	15 % ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	16 % OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	17 %
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	18 %//////////////////////////////////////////////////////////////////////////////
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	19
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	20 % ==================================================
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	21 % ARM32
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	22 % ==================================================
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	23 \subsection{ARM32 Calling Conventions}
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	24
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	25 \paragraph{Overview}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	26
117 4a64b733dc76 - doc, added first version of mips64 callconv page cslag parents: 95 diff changeset	27 The ARM32 family of processors is based on the Advanced RISC Machines (ARM)
4a64b733dc76 - doc, added first version of mips64 callconv page cslag parents: 95 diff changeset	28 processor architecture (32 bit RISC).
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	29 The word size is 32 bits (and the programming model is LLP64).\\
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	30 Basically, this family of microprocessors can be run in 2 major modes:\\
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	31 \\
77 e441ef3ec782 - manual layout tweaks cslag parents: 76 diff changeset	32 \begin{tabular*}{0.95\textwidth}{2 B}
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	33 Mode & Description\\
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	34 \hline
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	35 {\bf ARM} & 32bit instruction set\\
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	36 {\bf THUMB} & compressed instruction set using 16bit wide instruction encoding\\
76 7ca46969e0ad - tweaks in manual, mainly for html generation cslag parents: 51 diff changeset	37 \end{tabular*}
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	38 \\
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	39 \\
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	40 For more details, take a look at the ARM-THUMB Procedure Call Standard (ATPCS)
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	41 \cite{ATPCS}, the Procedure Call Standard for the ARM Architecture (AAPCS)
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	42 \cite{AAPCS}, as well as Debian's ARM EABI port \cite{armeabi} and hard-float
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	43 \cite{armhf} wiki pages.\\ \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	44
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	45 \paragraph{\product{dyncall} support}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	46
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	47 Currently, the \product{dyncall} library supports the ARM and THUMB mode of the
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	48 ARM32 family (ATPCS \cite{ATPCS}, EABI \cite{armeabi}, the ARM hard-float
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	49 (armhf) \cite{armeabi} varian, as well as Apple's calling convention based on
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	50 the ATPCS), excluding manually triggered ARM-THUMB interworking calls.\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	51 Also supported is armhf, a calling convention with register support to pass
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	52 floating point numbers. FPA and the VFP (scalar mode) procedure call standards,
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	53 as well as some instruction sets accelerating DSP and multimedia application
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	54 like the ARM Jazelle Technology (direct Java bytecode execution, providing
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	55 acceleration for some bytecodes while calling software code for others), etc.,
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	56 are not supported by the dyncall library.\\
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	57
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	58
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	59 \subsubsection{ATPCS ARM mode}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	60
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	61
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	62 \paragraph{Registers and register usage}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	63
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	64 In ARM mode, the ARM32 processor has sixteen 32 bit general purpose registers, namely r0-r15:\\
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	65 \\
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	66 \begin{table}[h]
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	67 \begin{tabular*}{0.95\textwidth}{lll}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	68 Name & Alias & Brief description\\
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	69 \hline
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	70 {\bf r0} & {\bf a1} & parameter 0, scratch, return value\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	71 {\bf r1} & {\bf a2} & parameter 1, scratch, return value\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	72 {\bf r2,r3} & {\bf a3,a4} & parameters 2 and 3, scratch\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	73 {\bf r4-r9} & {\bf v1-v6} & permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	74 {\bf r10} & {\bf sl} & permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	75 {\bf r11} & {\bf fp} & frame pointer, permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	76 {\bf r12} & {\bf ip} & scratch\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	77 {\bf r13} & {\bf sp} & stack pointer, permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	78 {\bf r14} & {\bf lr} & link register, permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	79 {\bf r15} & {\bf pc} & program counter (note: due to pipeline, r15 points to 2 instructions ahead)\\
76 7ca46969e0ad - tweaks in manual, mainly for html generation cslag parents: 51 diff changeset	80 \end{tabular*}
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	81 \caption{Register usage on arm32}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	82 \end{table}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	83
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	84 \paragraph{Parameter passing}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	85
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	86 \begin{itemize}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	87 \item stack parameter order: right-to-left
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	88 \item caller cleans up the stack
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	89 \item first four words are passed using r0-r3
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	90 \item subsequent parameters are pushed onto the stack (in right to left order, such that the stack pointer points to the first of the remaining parameters)
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	91 \item if the callee takes the address of one of the parameters and uses it to address other parameters (e.g. varargs) it has to copy - in its prolog - the first four words to a reserved stack area adjacent to the other parameters on the stack
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	92 \item parameters \textless=\ 32 bits are passed as 32 bit words
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	93 \item 64 bit parameters are passed as two 32 bit parts (even partly via the register and partly via the stack, although this doesn't seem to be specified in the ATPCS)
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	94 \item structures and unions are passed by value, with the first four words of the parameters in r0-r3
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	95 \item if return value is a structure, a pointer pointing to the return value's space is passed in r0, the first parameter in r1, etc... (see {\bf return values})
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	96 \item keeping the stack eight-byte aligned can improve memory access performance and is required by LDRD and STRD on ARMv5TE processors which are part of the ARM32 family, so, in order to avoid problems one should always align the stack (tests have shown, that GCC does care about the alignment when using the ellipsis)
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	97 \end{itemize}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	98
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	99 \paragraph{Return values}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	100 \begin{itemize}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	101 \item return values \textless=\ 32 bits use r0
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	102 \item 64 bit return values use r0 and r1
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	103 \item if return value is a structure, the caller allocates space for the return value on the stack in its frame and passes a pointer to it in r0
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	104 \end{itemize}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	105
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	106 \paragraph{Stack layout}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	107
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	108 % verified/amended: TP nov 2019 (see also doc/disas_examples/arm.atpcs_arm.disas)
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	109 Stack directly after function prolog:\\
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	110
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	111 \begin{figure}[h]
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	112 \begin{tabular}{5\|3\|1 1}
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	113 & \vdots & & \\
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	114 \hhline{~=~~}
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	115 register save area & \hspace{4cm} & & \mrrbrace{5}{caller's frame} \\
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	116 \hhline{~-~~}
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	117 local data & & & \\
117 4a64b733dc76 - doc, added first version of mips64 callconv page cslag parents: 95 diff changeset	118 \hhline{~-~~}
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	119 \mrlbrace{7}{parameter area} & last arg & \mrrbrace{3}{stack parameters} & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	120 & \ldots & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	121 & 5th word of arg data & & \\
117 4a64b733dc76 - doc, added first version of mips64 callconv page cslag parents: 95 diff changeset	122 \hhline{~=~~}
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	123 & r3 & \mrrbrace{4}{spill area (if needed)} & \mrrbrace{7}{current frame} \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	124 & r2 & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	125 & r1 & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	126 & r0 & & \\
117 4a64b733dc76 - doc, added first version of mips64 callconv page cslag parents: 95 diff changeset	127 \hhline{~-~~}
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	128 register save area (with return address) & & & \\ %fp points here to 1st word of this area: $\leftarrow$ fp
117 4a64b733dc76 - doc, added first version of mips64 callconv page cslag parents: 95 diff changeset	129 \hhline{~-~~}
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	130 local data & & & \\
117 4a64b733dc76 - doc, added first version of mips64 callconv page cslag parents: 95 diff changeset	131 \hhline{~-~~}
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	132 parameter area & \vdots & & \\
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	133 \end{tabular}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	134 \caption{Stack layout on arm32}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	135 \end{figure}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	136
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	137
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	138 \newpage
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	139
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	140
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	141 \subsubsection{ATPCS THUMB mode}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	142
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	143
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	144 \paragraph{Status}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	145
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	146 \begin{itemize}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	147 \item The ATPCS THUMB mode is untested.
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	148 \item Ellipse calls may not work.
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	149 \item C++ this calls do not work.
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	150 \end{itemize}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	151
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	152 \paragraph{Registers and register usage}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	153
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	154 In THUMB mode, the ARM32 processor family supports eight 32 bit general purpose registers r0-r7 and access to high order registers r8-r15:\\
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	155 \\
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	156 \begin{table}[h]
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	157 \begin{tabular*}{0.95\textwidth}{lll}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	158 Name & Alias & Brief description\\
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	159 \hline
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	160 {\bf r0} & {\bf a1} & parameter 0, scratch, return value\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	161 {\bf r1} & {\bf a2} & parameter 1, scratch, return value\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	162 {\bf r2,r3} & {\bf a3,a4} & parameters 2 and 3, scratch\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	163 {\bf r4-r6} & {\bf v1-v3} & permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	164 {\bf r7} & {\bf v4} & frame pointer, permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	165 {\bf r8-r11} & {\bf v5-v8} & permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	166 {\bf r12} & {\bf ip} & scratch\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	167 {\bf r13} & {\bf sp} & stack pointer, permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	168 {\bf r14} & {\bf lr} & link register, permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	169 {\bf r15} & {\bf pc} & program counter (note: due to pipeline, r15 points to 2 instructions ahead)\\
76 7ca46969e0ad - tweaks in manual, mainly for html generation cslag parents: 51 diff changeset	170 \end{tabular*}
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	171 \caption{Register usage on arm32 thumb mode}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	172 \end{table}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	173
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	174 \paragraph{Parameter passing}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	175
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	176 \begin{itemize}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	177 \item stack parameter order: right-to-left
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	178 \item caller cleans up the stack
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	179 \item first four words are passed using r0-r3
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	180 \item subsequent parameters are pushed onto the stack (in right to left order, such that the stack pointer points to the first of the remaining parameters)
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	181 \item if the callee takes the address of one of the parameters and uses it to address other parameters (e.g. varargs) it has to copy - in its prolog - the first four words to a reserved stack area adjacent to the other parameters on the stack
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	182 \item parameters \textless=\ 32 bits are passed as 32 bit words
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	183 \item 64 bit parameters are passed as two 32 bit parts (even partly via the register and partly via the stack), although this doesn't seem to be specified in the ATPCS)
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	184 \item structures and unions are passed by value, with the first four words of the parameters in r0-r3
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	185 \item if return value is a structure, a pointer pointing to the return value's space is passed in r0, the first parameter in r1, etc. (see {\bf return values})
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	186 \item keeping the stack eight-byte aligned can improve memory access performance and is required by LDRD and STRD on ARMv5TE processors which are part of the ARM32 family, so, in order to avoid problems one should always align the stack (tests have shown, that GCC does care about the alignment when using the ellipsis)
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	187 \end{itemize}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	188
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	189 \paragraph{Return values}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	190 \begin{itemize}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	191 \item return values \textless=\ 32 bits use r0
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	192 \item 64 bit return values use r0 and r1
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	193 \item if return value is a structure, the caller allocates space for the return value on the stack in its frame and passes a pointer to it in r0
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	194 \end{itemize}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	195
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	196 \paragraph{Stack layout}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	197
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	198 Stack directly after function prolog:\\
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	199
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	200 \begin{figure}[h]
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	201 \begin{tabular}{5\|3\|1 1}
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	202 & \vdots & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	203 \hhline{~=~~}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	204 register save area & \hspace{4cm} & & \mrrbrace{5}{caller's frame} \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	205 \hhline{~-~~}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	206 local data & & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	207 \hhline{~-~~}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	208 \mrlbrace{7}{parameter area} & last arg & \mrrbrace{3}{stack parameters} & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	209 & \ldots & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	210 & 5th word of arg data & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	211 \hhline{~=~~}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	212 & r3 & \mrrbrace{4}{spill area (if needed)} & \mrrbrace{7}{current frame} \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	213 & r2 & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	214 & r1 & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	215 & r0 & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	216 \hhline{~-~~}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	217 register save area (with return address) & & & \\ %fp points here to 1st word of this area: $\leftarrow$ fp
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	218 \hhline{~-~~}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	219 local data & & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	220 \hhline{~-~~}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	221 parameter area & \vdots & & \\
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	222 \end{tabular}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	223 \caption{Stack layout on arm32 thumb mode}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	224 \end{figure}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	225
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	226
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	227 \newpage
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	228
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	229
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	230 \subsubsection{EABI (ARM and THUMB mode)}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	231
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	232
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	233 The ARM EABI is very similar to the ABI outlined in ARM-THUMB procedure call
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	234 standard (ATPCS) \cite{ATPCS} - however, the EABI requires the stack to be
41 00310bf92924 - doc cslag parents: 35 diff changeset	235 8-byte aligned at function entries, as well as for 64 bit parameters. The latter
00310bf92924 - doc cslag parents: 35 diff changeset	236 are aligned on 8-byte boundaries on the stack and 2-registers for a parameter
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	237 passed via register. In order to achieve such an alignment, a register might
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	238 have to be skipped for parameters passed via registers, or 4-bytes on the stack
35 61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	239 for parameters passed via the stack. Refer to the Debian ARM EABI port wiki
173 8402121e1737 - doc tweaks cslag parents: 148 diff changeset	240 for more information \cite{armeabi}.\\
8402121e1737 - doc tweaks cslag parents: 148 diff changeset	241 \\
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	242 \paragraph{Status}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	243
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	244 \begin{itemize}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	245 \item The EABI THUMB mode is tested and works fine (contrary to the ATPCS).
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	246 \item Ellipse calls do not work.
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	247 \item C++ this calls do not work.
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	248 \end{itemize}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	249
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	250
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	251 \newpage
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	252
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	253
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	254 \subsubsection{ARM on Apple's iOS (Darwin) Platform (ARM and THUMB mode)}
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	255
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	256
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	257 The iOS runs on ARMv6 (iOS 2.0) and ARMv7 (iOS 3.0) architectures. Both, ARM and THUMB are available,
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	258 code is usually compiled in THUMB mode.\\
173 8402121e1737 - doc tweaks cslag parents: 148 diff changeset	259 \\
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	260 \paragraph{Register usage}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	261
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	262 \begin{table}[h]
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	263 \begin{tabular*}{0.95\textwidth}{lll}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	264 Name & Alias & Brief description\\
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	265 \hline
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	266 {\bf r0} & & parameter 0, scratch, return value\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	267 {\bf r1} & & parameter 1, scratch, return value\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	268 {\bf r2,r3} & & parameters 2 and 3, scratch\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	269 {\bf r4-r6} & & permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	270 {\bf r7} & & frame pointer, permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	271 {\bf r8} & & permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	272 {\bf r9} & & permanent (iOS 2.0) / scratch (since iOS 3.0)\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	273 {\bf r10-r11}& & permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	274 {\bf r12} & & scratch, intra-procedure scratch register (IP) used by dynamic linker\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	275 {\bf r13} & {\bf sp} & stack pointer, permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	276 {\bf r14} & {\bf lr} & link register, permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	277 {\bf r15} & {\bf pc} & program counter (note: due to pipeline, r15 points to 2 instructions ahead)\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	278 {\bf cpsr} & & program status register\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	279 {\bf d0-d7} & & scratch, aliases s0-s15, on ARMv7 also as q0-q3; not accessible from Thumb mode on ARMv6\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	280 {\bf d8-d15} & & permanent, aliases s16-s31, on ARMv7 also as q4-q7; not accesible from Thumb mode on ARMv6\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	281 {\bf d16-d31}& & only available in ARMv7, aliases q8-q15\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	282 {\bf fpscr} & & VFP status register\\
76 7ca46969e0ad - tweaks in manual, mainly for html generation cslag parents: 51 diff changeset	283 \end{tabular*}
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	284 \caption{Register usage on ARM Apple iOS}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	285 \end{table}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	286
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	287 \paragraph{Parameter passing and Return values}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	288
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	289 The ABI is based on the AAPCS but with the following important differences:
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	290
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	291 \begin{itemize}
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	292 \item in ARM mode, r7 is used as frame pointer instead of r11 (so both, ARM and THUMB mode use the same convention)
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	293 \item r9 does not need to be preserved on iOS 3.0 and greater
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	294 \end{itemize}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	295
34 645307d37731 - started section for armhf in doc cslag parents: 0 diff changeset	296
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	297 \paragraph{Stack layout}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	298
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	299 % verified/amended: TP nov 2019 (see also doc/disas_examples/arm.darwin_{arm,thumb}.disas)
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	300 Stack directly after function prolog:\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	301
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	302 \begin{figure}[h]
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	303 \begin{tabular}{5\|3\|1 1}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	304 & \vdots & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	305 \hhline{~=~~}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	306 register save area & \hspace{4cm} & & \mrrbrace{5}{caller's frame} \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	307 \hhline{~-~~}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	308 local data & & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	309 \hhline{~-~~}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	310 \mrlbrace{7}{parameter area} & last arg & \mrrbrace{3}{stack parameters} & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	311 & \ldots & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	312 & 5th word of arg data @@@verify & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	313 \hhline{~=~~}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	314 & r3 & \mrrbrace{4}{spill area (if needed)} & \mrrbrace{7}{current frame} \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	315 & r2 & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	316 & r1 & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	317 & r0 & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	318 \hhline{~-~~}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	319 register save area (with return address) & & & \\ %fp points here to 1st word of this area: $\leftarrow$ fp
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	320 \hhline{~-~~}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	321 local data & & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	322 \hhline{~-~~}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	323 parameter area & \vdots & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	324 \end{tabular}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	325 \caption{Stack layout on arm32}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	326 \end{figure}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	327
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	328
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	329 \newpage
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	330
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	331
34 645307d37731 - started section for armhf in doc cslag parents: 0 diff changeset	332 \subsubsection{ARM hard float (armhf)}
645307d37731 - started section for armhf in doc cslag parents: 0 diff changeset	333
645307d37731 - started section for armhf in doc cslag parents: 0 diff changeset	334
35 61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	335 Most debian-based Linux systems on ARMv7 (or ARMv6 with FPU) platforms use a calling convention referred to
41 00310bf92924 - doc cslag parents: 35 diff changeset	336 as armhf, using 16 32-bit floating point registers of the FPU of the VFPv3-D16 extension to the ARM architecture.
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	337 Refer to the debian wiki for more information \cite{armhf}. % The following is for ARM mode, find platform that uses thumb+hard-float @@@
35 61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	338
173 8402121e1737 - doc tweaks cslag parents: 148 diff changeset	339 Code is little-endian, rest is similar to EABI with an 8-byte aligned stack, etc..\\
8402121e1737 - doc tweaks cslag parents: 148 diff changeset	340 \\
34 645307d37731 - started section for armhf in doc cslag parents: 0 diff changeset	341 \paragraph{Register usage}
645307d37731 - started section for armhf in doc cslag parents: 0 diff changeset	342
645307d37731 - started section for armhf in doc cslag parents: 0 diff changeset	343 \begin{table}[h]
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	344 \begin{tabular*}{0.95\textwidth}{lll}
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	345 Name & Alias & Brief description\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	346 \hline
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	347 {\bf r0} & {\bf a1} & parameter 0, scratch, non floating point return value\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	348 {\bf r1} & {\bf a2} & parameter 1, scratch, non floating point return value\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	349 {\bf r2,r3} & {\bf a3,a4} & parameters 2 and 3, scratch\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	350 {\bf r4-r9} & {\bf v1-v6} & permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	351 {\bf r10} & {\bf sl} & permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	352 {\bf r11} & {\bf fp} & frame pointer, permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	353 {\bf r12} & {\bf ip} & scratch, intra-procedure scratch register (IP) used by dynamic linker\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	354 {\bf r13} & {\bf sp} & stack pointer, permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	355 {\bf r14} & {\bf lr} & link register, permanent\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	356 {\bf r15} & {\bf pc} & program counter (note: due to pipeline, r15 points to 2 instructions ahead)\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	357 {\bf cpsr} & & program status register\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	358 {\bf s0} & & floating point argument, floating point return value, single precision\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	359 {\bf d0} & & floating point argument, floating point return value, double precision, aliases s0-s1\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	360 {\bf s1-s15} & & floating point arguments, single precision\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	361 {\bf d1-d7} & & aliases s2-s15, floating point arguments, double precision\\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	362 {\bf fpscr} & & VFP status register\\
76 7ca46969e0ad - tweaks in manual, mainly for html generation cslag parents: 51 diff changeset	363 \end{tabular*}
34 645307d37731 - started section for armhf in doc cslag parents: 0 diff changeset	364 \caption{Register usage on armhf}
645307d37731 - started section for armhf in doc cslag parents: 0 diff changeset	365 \end{table}
645307d37731 - started section for armhf in doc cslag parents: 0 diff changeset	366
35 61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	367 \paragraph{Parameter passing}
61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	368
61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	369 \begin{itemize}
61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	370 \item stack parameter order: right-to-left
61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	371 \item caller cleans up the stack
61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	372 \item first four non-floating-point words are passed using r0-r3
51 9e9d6a90492a - armhf experimental vararg call support cslag parents: 50 diff changeset	373 \item out of those, 64bit parameters use 2 registers, either r0,r1 or r2,r3 (skipped registers are left unused)
41 00310bf92924 - doc cslag parents: 35 diff changeset	374 \item first 16 single-precision, or 8 double-precision arguments are passed via s0-s15 or d0-d7, respectively (note that since s and d registers are aliased, already used ones are skipped)
35 61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	375 \item subsequent parameters are pushed onto the stack (in right to left order, such that the stack pointer points to the first of the remaining parameters)
47 c4de113dc1e9 - some armhf comments, doc clarification, cleanup cslag parents: 45 diff changeset	376 \item note that as soon one floating point parameter is passed via the stack, subsequent single precision floating point parameters are also pushed onto the stack even if there are still free S* registers
51 9e9d6a90492a - armhf experimental vararg call support cslag parents: 50 diff changeset	377 \item float and double vararg function parameters (no matter if in ellipsis part of function, or not) are passed like int or long long parameters, vfp registers aren't used
50 9bd3c5219505 - minor test code fix cslag parents: 47 diff changeset	378 \item if the callee takes the address of one of the parameters and uses it to address other parameters (e.g. varargs) it has to copy - in its prolog - the first four words (for first 4 integer arguments) to a reserved stack area adjacent to the other parameters on the stack
35 61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	379 \item parameters \textless=\ 32 bits are passed as 32 bit words
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	380 \item structures and unions are passed by value, with the first four words of the parameters in r0-r3
35 61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	381 \item if return value is a structure, a pointer pointing to the return value's space is passed in r0, the first parameter in r1, etc. (see {\bf return values})
148 12729fd52ab7 - performance improvement and more correct handling of arm32 armhf calls, not copying bogus data just to reserve spill area space cslag parents: 117 diff changeset	382 \item callee spills, caller reserves spill area space, though
35 61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	383 \end{itemize}
61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	384
61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	385 \paragraph{Return values}
61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	386 \begin{itemize}
42 ecc9403e214a - final touch for complete armhf callback support, yay cslag parents: 41 diff changeset	387 \item non floating point return values \textless=\ 32 bits use r0
ecc9403e214a - final touch for complete armhf callback support, yay cslag parents: 41 diff changeset	388 \item non floating point 64-bit return values use r0 and r1
ecc9403e214a - final touch for complete armhf callback support, yay cslag parents: 41 diff changeset	389 \item single precision floating point return value uses s0
ecc9403e214a - final touch for complete armhf callback support, yay cslag parents: 41 diff changeset	390 \item double precision floating point return value uses d0
35 61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	391 \item if return value is a structure, the caller allocates space for the return value on the stack in its frame and passes a pointer to it in r0
61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	392 \end{itemize}
61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	393
148 12729fd52ab7 - performance improvement and more correct handling of arm32 armhf calls, not copying bogus data just to reserve spill area space cslag parents: 117 diff changeset	394 \paragraph{Stack layout}
35 61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	395
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	396 % verified/amended: TP nov 2019 (see also doc/disas_examples/arm.armhf.disas)
148 12729fd52ab7 - performance improvement and more correct handling of arm32 armhf calls, not copying bogus data just to reserve spill area space cslag parents: 117 diff changeset	397 Stack directly after function prolog:\\
12729fd52ab7 - performance improvement and more correct handling of arm32 armhf calls, not copying bogus data just to reserve spill area space cslag parents: 117 diff changeset	398
12729fd52ab7 - performance improvement and more correct handling of arm32 armhf calls, not copying bogus data just to reserve spill area space cslag parents: 117 diff changeset	399 \begin{figure}[h]
12729fd52ab7 - performance improvement and more correct handling of arm32 armhf calls, not copying bogus data just to reserve spill area space cslag parents: 117 diff changeset	400 \begin{tabular}{5\|3\|1 1}
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	401 & \vdots & & \\
148 12729fd52ab7 - performance improvement and more correct handling of arm32 armhf calls, not copying bogus data just to reserve spill area space cslag parents: 117 diff changeset	402 \hhline{~=~~}
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	403 register save area & \hspace{4cm} & & \mrrbrace{5}{caller's frame} \\
148 12729fd52ab7 - performance improvement and more correct handling of arm32 armhf calls, not copying bogus data just to reserve spill area space cslag parents: 117 diff changeset	404 \hhline{~-~~}
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	405 local data & & & \\
148 12729fd52ab7 - performance improvement and more correct handling of arm32 armhf calls, not copying bogus data just to reserve spill area space cslag parents: 117 diff changeset	406 \hhline{~-~~}
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	407 \mrlbrace{7}{parameter area} & last arg & \mrrbrace{3}{stack parameters} & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	408 & \ldots & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	409 & first arg passed via stack & & \\
148 12729fd52ab7 - performance improvement and more correct handling of arm32 armhf calls, not copying bogus data just to reserve spill area space cslag parents: 117 diff changeset	410 \hhline{~=~~}
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	411 & r3 & \mrrbrace{4}{spill area (if needed)} & \mrrbrace{7}{current frame} \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	412 & r2 & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	413 & r1 & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	414 & r0 & & \\
148 12729fd52ab7 - performance improvement and more correct handling of arm32 armhf calls, not copying bogus data just to reserve spill area space cslag parents: 117 diff changeset	415 \hhline{~-~~}
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	416 register save area (with return address) & & & \\ %fp points here to 1st word of this area: $\leftarrow$ fp
148 12729fd52ab7 - performance improvement and more correct handling of arm32 armhf calls, not copying bogus data just to reserve spill area space cslag parents: 117 diff changeset	417 \hhline{~-~~}
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	418 local data & & & \\
148 12729fd52ab7 - performance improvement and more correct handling of arm32 armhf calls, not copying bogus data just to reserve spill area space cslag parents: 117 diff changeset	419 \hhline{~-~~}
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	420 parameter area & \vdots & & \\
148 12729fd52ab7 - performance improvement and more correct handling of arm32 armhf calls, not copying bogus data just to reserve spill area space cslag parents: 117 diff changeset	421 \end{tabular}
12729fd52ab7 - performance improvement and more correct handling of arm32 armhf calls, not copying bogus data just to reserve spill area space cslag parents: 117 diff changeset	422 \caption{Stack layout on arm32 armhf}
12729fd52ab7 - performance improvement and more correct handling of arm32 armhf calls, not copying bogus data just to reserve spill area space cslag parents: 117 diff changeset	423 \end{figure}
12729fd52ab7 - performance improvement and more correct handling of arm32 armhf calls, not copying bogus data just to reserve spill area space cslag parents: 117 diff changeset	424
12729fd52ab7 - performance improvement and more correct handling of arm32 armhf calls, not copying bogus data just to reserve spill area space cslag parents: 117 diff changeset	425
12729fd52ab7 - performance improvement and more correct handling of arm32 armhf calls, not copying bogus data just to reserve spill area space cslag parents: 117 diff changeset	426 \newpage
35 61edd9cf8026 - armhf doc update cslag parents: 34 diff changeset	427
34 645307d37731 - started section for armhf in doc cslag parents: 0 diff changeset	428
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	429 \subsubsection{Architectures}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	430
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	431 The ARM architecture family contains several revisions with capabilities and
117 4a64b733dc76 - doc, added first version of mips64 callconv page cslag parents: 95 diff changeset	432 extensions (such as thumb-interworking, more vector registers, ...)
4a64b733dc76 - doc, added first version of mips64 callconv page cslag parents: 95 diff changeset	433 The following table sums up the most important properties of the various
34 645307d37731 - started section for armhf in doc cslag parents: 0 diff changeset	434 architecture standards, from a calling convention perspective.
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	435
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	436 % iPhone 3GS : ARM Cortex-A8
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	437 % Nintendo DS: ARM 7 and ARM 9
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	438 % ARM 7: ARMv4T
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	439 % ARM 9: ARMv4T, HTC Wizard
34 645307d37731 - started section for armhf in doc cslag parents: 0 diff changeset	440 % Cortex-*: ARMv7, Raspberry Pi 2, ...
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	441
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	442 \begin{table}[h]
77 e441ef3ec782 - manual layout tweaks cslag parents: 76 diff changeset	443 \begin{tabular*}{0.95\textwidth}{lll}
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	444 Arch & Platforms & Details \\
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	445 \hline
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	446 ARMv4 & & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	447 ARMv4T & ARM 7, ARM 9, Neo FreeRunner (OpenMoko) & \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	448 ARMv5 & ARM 9E & BLX instruction available \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	449 ARMv6 & & No vector registers available in thumb \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	450 ARMv7 & iPod touch, iPhone 3GS/4, Raspberry Pi 2 & VFP, armhf convention on some platforms \\
276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	451 ARMv8 & iPhone 6 and higher & 64bit support \\
76 7ca46969e0ad - tweaks in manual, mainly for html generation cslag parents: 51 diff changeset	452 \end{tabular*}
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	453 \caption{Overview of ARM Architecture, Platforms and Details}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	454 \end{table}
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	455
328 276eb8c87aa0 - review and fixes, cleanup, amendments to calling convention appendix of manual Tassilo Philipp parents: 277 diff changeset	456
0 3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	457 \newpage
3e629dc19168 initial from svn dyncall-1745 Daniel Adler parents: diff changeset	458

Mercurial > pub > dyncall > dyncall

annotate doc/manual/callconvs/callconv_arm32.tex @ 328:276eb8c87aa0