Mercurial > pub > dyncall > dyncall
annotate doc/manual/callconvs/callconv_arm64.tex @ 328:276eb8c87aa0
- review and fixes, cleanup, amendments to calling convention appendix of manual
| author | Tassilo Philipp |
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| date | Fri, 22 Nov 2019 23:11:56 +0100 |
| parents | 4a64b733dc76 |
| children | bac52ab8869f |
| rev | line source |
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1 %////////////////////////////////////////////////////////////////////////////// |
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3 % Copyright (c) 2014-2019 Daniel Adler <dadler@uni-goettingen.de>, |
| 0 | 4 % Tassilo Philipp <tphilipp@potion-studios.com> |
| 5 % | |
| 6 % Permission to use, copy, modify, and distribute this software for any | |
| 7 % purpose with or without fee is hereby granted, provided that the above | |
| 8 % copyright notice and this permission notice appear in all copies. | |
| 9 % | |
| 10 % THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
| 11 % WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
| 12 % MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
| 13 % ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
| 14 % WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
| 15 % ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
| 16 % OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
| 17 % | |
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18 %////////////////////////////////////////////////////////////////////////////// |
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| 20 % ================================================== | |
| 21 % ARM64 | |
| 22 % ================================================== | |
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23 \subsection{ARM64 Calling Conventions} |
| 0 | 24 |
| 25 \paragraph{Overview} | |
| 26 | |
| 117 | 27 ARMv8 introduced the AArch64 calling convention. ARM64 chips can be run in 64 or 32bit mode, but not by the same process. Interworking is only intra-process.\\ |
| 28 The word size is defined to be 32 bits, a dword 64 bits. Note that this is due to historical reasons (terminology didn't change from ARM32).\\ | |
| 95 | 29 For more details, take a look at the Procedure Call Standard for the ARM 64-bit Architecture \cite{AAPCS64}.\\ |
| 0 | 30 |
| 31 \paragraph{\product{dyncall} support} | |
| 32 | |
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33 The \product{dyncall} library supports the ARM 64-bit AArch64 PCS ABI, as well as Apple's convention derived from it, for calls and callbacks. |
| 0 | 34 |
| 35 \subsubsection{AAPCS64 Calling Convention} | |
| 36 | |
| 37 \paragraph{Registers and register usage} | |
| 38 | |
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39 ARM64 features thirty-one 64 bit general purpose registers, namely {\bf r0-r30}, |
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40 which are referred to as either {\bf x0-x30} for 64bit access, or {\bf w0-w30} |
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41 for 32bit access (with upper bits either cleared or sign extended on load).\\ |
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42 Also, there is {\bf sp/xzr/wzr}, a register with restricted use, used for the |
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43 stack pointer in instructions dealing with the stack ({\bf sp}) or a hardware |
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44 zero register for all other instructions {\bf xzr/wzr}, and {\bf pc}, the |
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45 program counter. Additionally, there are thirty-two 128 bit registers {\bf v0-v31}, |
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46 to be used as SIMD and floating point registers, referred to as {\bf q0-q31}, {\bf d0-d31} |
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47 and {\bf s0-s31}, respectively, depending on their use:\\ |
| 0 | 48 |
| 49 \begin{table}[h] | |
| 77 | 50 \begin{tabular*}{0.95\textwidth}{3 B} |
| 0 | 51 Name & Brief description\\ |
| 52 \hline | |
| 53 {\bf x0-x7} & parameters, scratch, return value\\ | |
| 54 {\bf x8} & indirect result location pointer\\ | |
| 55 {\bf x9-x15} & scratch\\ | |
| 56 {\bf x16} & permanent in some cases, can have special function (IP0), see doc\\ | |
| 57 {\bf x17} & permanent in some cases, can have special function (IP1), see doc\\ | |
| 58 {\bf x18} & reserved as platform register, advised not to be used for handwritten, portable asm, see doc \\ | |
| 59 {\bf x19-x28} & permanent\\ | |
| 60 {\bf x29} & permanent, frame pointer\\ | |
| 61 {\bf x30} & permanent, link register\\ | |
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62 {\bf sp} & permanent, stack pointer\\ |
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63 {\bf pc} & program counter\\ |
| 76 | 64 \end{tabular*} |
| 0 | 65 \caption{Register usage on arm64} |
| 66 \end{table} | |
| 67 | |
| 68 \paragraph{Parameter passing} | |
| 69 | |
| 70 \begin{itemize} | |
| 71 \item stack parameter order: right-to-left | |
| 72 \item caller cleans up the stack | |
| 73 \item first 8 integer arguments are passed using x0-x7 | |
| 74 \item first 8 floating point arguments are passed using d0-d7 | |
| 75 \item subsequent parameters are pushed onto the stack | |
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76 \item if the callee takes the address of one of the parameters and uses it to address other parameters (e.g. varargs) it has to copy - in its prolog - the first 8 integer and 8 floating-point registers to a reserved stack area adjacent to the other parameters on the stack (only the unnamed integer parameters require saving, though) |
| 0 | 77 \item structures and unions are passed by value, with the first four words of the parameters in r0-r3 |
| 78 \item if return value is a structure, a pointer pointing to the return value's space is passed in r0, the first parameter in r1, etc... (see {\bf return values}) | |
| 79 \item stack is required to be throughout eight-byte aligned | |
| 80 \end{itemize} | |
| 81 | |
| 82 \paragraph{Return values} | |
| 83 \begin{itemize} | |
| 84 \item integer return values use x0 | |
| 85 \item floating-point return values use d0 | |
| 86 \item otherwise, the caller allocates space, passes pointer to it to the callee through x8, and callee writes return value to this space | |
| 87 \end{itemize} | |
| 88 | |
| 89 \paragraph{Stack layout} | |
| 90 | |
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91 % verified/amended: TP nov 2019 (see also doc/disas_examples/arm64.aapcs.disas) |
| 0 | 92 Stack directly after function prolog:\\ |
| 93 | |
| 94 \begin{figure}[h] | |
| 95 \begin{tabular}{5|3|1 1} | |
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96 & \vdots & & \\ |
| 92 | 97 \hhline{~=~~} |
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98 register save area & \hspace{4cm} & & \mrrbrace{5}{caller's frame} \\ |
| 92 | 99 \hhline{~-~~} |
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100 local data & & & \\ |
| 92 | 101 \hhline{~-~~} |
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102 \mrlbrace{9}{parameter area} & arg n-1 & \mrrbrace{3}{stack parameters} & \\ |
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103 & \ldots & & \\ |
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104 & arg 8 & & \\ |
| 92 | 105 \hhline{~=~~} |
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106 & x7 & \mrrbrace{6}{spill area (if needed)} & \mrrbrace{9}{current frame} \\ |
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107 & \ldots & & \\ |
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108 & x? (first unnamed reg) & & \\ |
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109 & q7 & & \\ |
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110 & \ldots & & \\ |
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111 & q0 & & \\ |
| 92 | 112 \hhline{~-~~} |
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113 register save area (with return address) & & & \\ % fp will point here (to 1st arg) @@@ verify |
| 92 | 114 \hhline{~-~~} |
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115 local data & & & \\ |
| 92 | 116 \hhline{~-~~} |
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117 parameter area & \vdots & & \\ |
| 0 | 118 \end{tabular} |
| 119 \caption{Stack layout on arm64} | |
| 120 \end{figure} | |
| 121 | |
| 122 \newpage | |
| 123 | |
| 124 | |
| 125 \subsubsection{Apple's ARM64 Function Calling Conventions} | |
| 126 | |
| 127 \paragraph{Overview} | |
| 128 | |
| 129 Apple's ARM64 calling convention is based on the AAPCS64 standard, however, diverges in some ways. | |
| 130 Only the differences are listed here, for more details, take a look at Apple's official documentation \cite{AppleARM64}. | |
| 131 | |
| 132 \begin{itemize} | |
| 133 \item arguments passed via stack use only the space they need, but are subject to the type alignment requirements (which is 1 byte for char and bool, 2 for short, 4 for int and 8 for every other type) | |
| 134 \item caller is required to sign and zero-extend arguments smaller than 32bits | |
| 135 \end{itemize} | |
| 136 |