Mercurial > pub > dyncall > dyncall
diff doc/manual/callconvs/callconv_arm64.tex @ 328:276eb8c87aa0
- review and fixes, cleanup, amendments to calling convention appendix of manual
| author | Tassilo Philipp |
|---|---|
| date | Fri, 22 Nov 2019 23:11:56 +0100 |
| parents | 4a64b733dc76 |
| children | bac52ab8869f |
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--- a/doc/manual/callconvs/callconv_arm64.tex Fri Nov 22 23:08:59 2019 +0100 +++ b/doc/manual/callconvs/callconv_arm64.tex Fri Nov 22 23:11:56 2019 +0100 @@ -1,5 +1,6 @@ +%////////////////////////////////////////////////////////////////////////////// % -% Copyright (c) 2014,2015 Daniel Adler <dadler@uni-goettingen.de>, +% Copyright (c) 2014-2019 Daniel Adler <dadler@uni-goettingen.de>, % Tassilo Philipp <tphilipp@potion-studios.com> % % Permission to use, copy, modify, and distribute this software for any @@ -14,11 +15,12 @@ % ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF % OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. % +%////////////////////////////////////////////////////////////////////////////// % ================================================== % ARM64 % ================================================== -\subsection{ARM64 Calling Convention} +\subsection{ARM64 Calling Conventions} \paragraph{Overview} @@ -28,17 +30,21 @@ \paragraph{\product{dyncall} support} -The \product{dyncall} library supports the ARM 64-bit AArch64 PCS ABI, for calls and callbacks. +The \product{dyncall} library supports the ARM 64-bit AArch64 PCS ABI, as well as Apple's convention derived from it, for calls and callbacks. \subsubsection{AAPCS64 Calling Convention} \paragraph{Registers and register usage} -ARM64 features thirty-one 64 bit general purpose registers, namely x0-x30. -Also, there is SP, a register with restricted use, used for the stack pointer, -and PC dedicated as program counter. Additionally, there are thirty-two 128 bit -registers v0-v31, to be used as SIMD and floating point registers, referred to -as q0-q31, d0-d31 and s0-s31, respectively, depending on their use:\\ +ARM64 features thirty-one 64 bit general purpose registers, namely {\bf r0-r30}, +which are referred to as either {\bf x0-x30} for 64bit access, or {\bf w0-w30} +for 32bit access (with upper bits either cleared or sign extended on load).\\ +Also, there is {\bf sp/xzr/wzr}, a register with restricted use, used for the +stack pointer in instructions dealing with the stack ({\bf sp}) or a hardware +zero register for all other instructions {\bf xzr/wzr}, and {\bf pc}, the +program counter. Additionally, there are thirty-two 128 bit registers {\bf v0-v31}, +to be used as SIMD and floating point registers, referred to as {\bf q0-q31}, {\bf d0-d31} +and {\bf s0-s31}, respectively, depending on their use:\\ \begin{table}[h] \begin{tabular*}{0.95\textwidth}{3 B} @@ -53,8 +59,8 @@ {\bf x19-x28} & permanent\\ {\bf x29} & permanent, frame pointer\\ {\bf x30} & permanent, link register\\ -{\bf SP} & permanent, stack pointer\\ -{\bf PC} & program counter\\ +{\bf sp} & permanent, stack pointer\\ +{\bf pc} & program counter\\ \end{tabular*} \caption{Register usage on arm64} \end{table} @@ -67,7 +73,7 @@ \item first 8 integer arguments are passed using x0-x7 \item first 8 floating point arguments are passed using d0-d7 \item subsequent parameters are pushed onto the stack -\item if the callee takes the address of one of the parameters and uses it to address other parameters (e.g. varargs) it has to copy - in its prolog - the first 8 integer and 8 floating-point registers to a reserved stack area adjacent to the other parameters on the stack (only the unnamed parameters require saving, though) +\item if the callee takes the address of one of the parameters and uses it to address other parameters (e.g. varargs) it has to copy - in its prolog - the first 8 integer and 8 floating-point registers to a reserved stack area adjacent to the other parameters on the stack (only the unnamed integer parameters require saving, though) \item structures and unions are passed by value, with the first four words of the parameters in r0-r3 \item if return value is a structure, a pointer pointing to the return value's space is passed in r0, the first parameter in r1, etc... (see {\bf return values}) \item stack is required to be throughout eight-byte aligned @@ -82,41 +88,33 @@ \paragraph{Stack layout} +% verified/amended: TP nov 2019 (see also doc/disas_examples/arm64.aapcs.disas) Stack directly after function prolog:\\ \begin{figure}[h] \begin{tabular}{5|3|1 1} -\hhline{~-~~} - & \vdots & & \\ + & \vdots & & \\ \hhline{~=~~} -register save area & \hspace{4cm} & & \mrrbrace{5}{caller's frame} \\ +register save area & \hspace{4cm} & & \mrrbrace{5}{caller's frame} \\ \hhline{~-~~} -local data & & & \\ +local data & & & \\ \hhline{~-~~} -\mrlbrace{13}{parameter area} & \ldots & \mrrbrace{3}{stack parameters} & \\ - & \ldots & & \\ - & \ldots & & \\ +\mrlbrace{9}{parameter area} & arg n-1 & \mrrbrace{3}{stack parameters} & \\ + & \ldots & & \\ + & arg 8 & & \\ \hhline{~=~~} - & x0 & \mrrbrace{10}{spill area (if needed)} & \mrrbrace{15}{current frame} \\ - & x1 & & \\ - & \ldots & & \\ - & x2 & & \\ - & x7 & & \\ - & d0 & & \\ - & d1 & & \\ - & \ldots & & \\ - & d2 & & \\ - & d7 & & \\ + & x7 & \mrrbrace{6}{spill area (if needed)} & \mrrbrace{9}{current frame} \\ + & \ldots & & \\ + & x? (first unnamed reg) & & \\ + & q7 & & \\ + & \ldots & & \\ + & q0 & & \\ \hhline{~-~~} -register save area & & & \\ -\hhline{~-~~} -local data & & & \\ +register save area (with return address) & & & \\ % fp will point here (to 1st arg) @@@ verify \hhline{~-~~} -link and frame register & x30 & & \\ - & x29 & & \\ +local data & & & \\ \hhline{~-~~} -parameter area & \vdots & & \\ -\hhline{~-~~} +parameter area & \vdots & & \\ \end{tabular} \caption{Stack layout on arm64} \end{figure}