Mercurial > pub > dyncall > dyncall
annotate doc/manual/callconvs/callconv_sparc.tex @ 190:06ee88ce4962
- doc and comment fixes
| author | Tassilo Philipp |
|---|---|
| date | Tue, 14 Mar 2017 00:07:31 +0100 |
| parents | e210193f6cf1 |
| children | 600bd90afdb7 |
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| 0 | 1 %////////////////////////////////////////////////////////////////////////////// |
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3 % Copyright (c) 2012-2017 Daniel Adler <dadler@uni-goettingen.de>, |
| 159 | 4 % Tassilo Philipp <tphilipp@potion-studios.com> |
| 0 | 5 % |
| 6 % Permission to use, copy, modify, and distribute this software for any | |
| 7 % purpose with or without fee is hereby granted, provided that the above | |
| 8 % copyright notice and this permission notice appear in all copies. | |
| 9 % | |
| 10 % THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
| 11 % WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
| 12 % MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
| 13 % ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
| 14 % WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
| 15 % ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
| 16 % OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
| 17 % | |
| 18 %////////////////////////////////////////////////////////////////////////////// | |
| 19 | |
| 20 \subsection{SPARC Calling Convention} | |
| 21 | |
| 22 \paragraph{Overview} | |
| 23 | |
| 24 The SPARC family of processors is based on the SPARC instruction set architecture, which comes in basically tree revisions, | |
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25 V7, V8 and V9.\cite{SPARCRef} The former two are 32-bit whereas the latter refers to the 64-bit SPARC architecture (see next chapter). |
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26 SPARC uses big endian byte order.\\ |
| 0 | 27 |
| 28 \paragraph{\product{dyncall} support} | |
| 29 | |
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30 \product{dyncall} fully supports the SPARC 32-bit instruction set (V7 and V8), for calls and callbacks. |
| 0 | 31 |
| 32 \subsubsection{SPARC (32-bit) Calling Convention} | |
| 33 | |
| 34 \paragraph{Register usage} | |
| 35 | |
| 36 \begin{itemize} | |
| 37 \item 32 32-bit integer/pointer registers | |
| 38 \item 32 floating point registers (usable as 8 quad precision, 16 double precision or 32 single precision registers) | |
| 39 \item 32 registers are accessible at a time (8 are global ones (g*), whereas the rest forms a register window with 8 input (i*), 8 output (o*) and 8 local (l*) ones) | |
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40 \item calling a function shifts the register window, the old output registers become the new input registers (old local and input ones are not accessible anymore) |
| 0 | 41 \end{itemize} |
| 42 | |
| 43 \begin{table}[h] | |
| 77 | 44 \begin{tabular*}{0.95\textwidth}{lll} |
| 0 | 45 Name & Alias & Brief description\\ |
| 46 \hline | |
| 47 {\bf \%g0} & & Read-only, hardwired to 0 \\ | |
| 48 {\bf \%g1-\%g7} & & Global \\ | |
| 49 {\bf \%o0 and \%i0} & & Output and input argument 0, return value \\ | |
| 50 {\bf \%o1-\%o5 and \%i1-\%i5} & & Output and input argument registers \\ | |
| 51 {\bf \%o6 and \%i6} & & Stack and frame pointer \\ | |
| 52 {\bf \%o7 and \%i7} & & Return address (caller writes to o7, callee uses i7) \\ | |
| 76 | 53 \end{tabular*} |
| 0 | 54 \caption{Register usage on sparc calling convention} |
| 55 \end{table} | |
| 56 | |
| 57 \paragraph{Parameter passing} | |
| 58 \begin{itemize} | |
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59 \item stack grows down |
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60 \item stack parameter order: right-to-left |
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61 \item caller cleans up the stack |
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62 \item stack always aligned to 8 bytes |
| 0 | 63 \item first 6 integers and floats are passed independently in registers using \%o0-\%o5 |
| 64 \item for every other argument the stack is used | |
| 190 | 65 \item all arguments \textless=\ 32 bit are passed as 32 bit values |
| 66 \item 64 bit arguments are passed like two consecutive \textless=\ 32 bit values | |
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67 \item minimum stack size is 64 bytes, b/c stack pointer must always point at enough space to store all \%i* and \%l* registers, used when running out of register windows |
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68 \item if needed, register spill area is adjacent to parameters |
| 190 | 69 \item results are expected by caller to be returned in \%o0/\%o1 (after reg window restore, meaning callee writes to \%i0/\%i1) for integers, \%f0/\%f1 for floats, and for structs/unions a pointer to them is used as a hidden stack parameter (see below) |
| 0 | 70 \end{itemize} |
| 71 | |
| 72 \paragraph{Stack layout} | |
| 73 | |
| 74 Stack directly after function prolog:\\ | |
| 75 | |
| 76 \begin{figure}[h] | |
| 77 \begin{tabular}{5|3|1 1} | |
| 78 \hhline{~-~~} | |
| 79 & \vdots & & \\ | |
| 80 \hhline{~=~~} | |
| 92 | 81 local data & \hspace{4cm} & & \mrrbrace{10}{caller's frame} \\ |
| 0 | 82 \hhline{~-~~} |
| 83 padding & & & \\ | |
| 84 \hhline{~-~~} | |
| 85 \mrlbrace{7}{parameter area} & argument x & \mrrbrace{3}{stack parameters} & \\ | |
| 86 & \ldots & & \\ | |
| 87 & argument 6 & & \\ | |
| 88 & input argument 5 spill & \mrrbrace{3}{spill area} & \\ | |
| 89 & \ldots & & \\ | |
| 90 & input argument 0 spill & & \\ | |
| 91 & struct/union return pointer & & \\ | |
| 92 \hhline{~-~~} | |
| 93 register save area (\%i* and \%l*) & & & \\ | |
| 94 \hhline{~=~~} | |
| 95 local data and padding & & & \mrrbrace{3}{current frame} \\ | |
| 96 \hhline{~-~~} | |
| 97 parameter area & & & \\ | |
| 98 \hhline{~-~~} | |
| 99 & \vdots & & \\ | |
| 100 \hhline{~-~~} | |
| 101 \end{tabular} | |
| 102 \\ | |
| 103 \\ | |
| 104 \\ | |
| 105 \caption{Stack layout on sparc calling convention} | |
| 106 \end{figure} | |
| 107 |