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1 %//////////////////////////////////////////////////////////////////////////////
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2 %
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3 % Copyright (c) 2012 Daniel Adler <dadler@uni-goettingen.de>,
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4 % Tassilo Philipp <tphilipp@potion-studios.com>
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5 %
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6 % Permission to use, copy, modify, and distribute this software for any
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7 % purpose with or without fee is hereby granted, provided that the above
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8 % copyright notice and this permission notice appear in all copies.
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9 %
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10 % THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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11 % WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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12 % MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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13 % ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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14 % WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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15 % ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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16 % OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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17 %
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18 %//////////////////////////////////////////////////////////////////////////////
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19
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20 \subsection{SPARC Calling Convention}
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21
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22 \paragraph{Overview}
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23
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24 The SPARC family of processors is based on the SPARC instruction set architecture, which comes in basically tree revisions,
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25 V7, V8 and V9. The former two are 32-bit whereas the latter refers to the 64-bit SPARC architecture (see next chapter). SPARC is big endian.
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26
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27 \paragraph{\product{dyncall} support}
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28
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29 \product{dyncall} fully supports the SPARC 32-bit instruction set (V7 and V8), \product{dyncallback} support is missing, though.
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30
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31 \subsubsection{SPARC (32-bit) Calling Convention}
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32
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33 \paragraph{Register usage}
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34
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35 \begin{itemize}
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36 \item 32 32-bit integer/pointer registers
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37 \item 32 floating point registers (usable as 8 quad precision, 16 double precision or 32 single precision registers)
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38 \item 32 registers are accessible at a time (8 are global ones (g*), whereas the rest forms a register window with 8 input (i*), 8 output (o*) and 8 local (l*) ones)
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39 \item invoking a function shifts the register window, the old output registers become the new input registers (old local and input ones are not accessible anymore)
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40 \end{itemize}
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41
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42 \begin{table}[h]
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43 \begin{tabular}{lll}
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44 \hline
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45 Name & Alias & Brief description\\
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46 \hline
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47 {\bf \%g0} & & Read-only, hardwired to 0 \\
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48 {\bf \%g1-\%g7} & & Global \\
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49 {\bf \%o0 and \%i0} & & Output and input argument 0, return value \\
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50 {\bf \%o1-\%o5 and \%i1-\%i5} & & Output and input argument registers \\
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51 {\bf \%o6 and \%i6} & & Stack and frame pointer \\
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52 {\bf \%o7 and \%i7} & & Return address (caller writes to o7, callee uses i7) \\
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53 \end{tabular}
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54 \caption{Register usage on sparc calling convention}
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55 \end{table}
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56
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57 \paragraph{Parameter passing}
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58 \begin{itemize}
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59 \item Stack parameter order: right-to-left @@@ really?
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60 \item Caller cleans up the stack @@@ really?
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61 \item Stack always aligned to 8 bytes.
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62 \item first 6 integers and floats are passed independently in registers using \%o0-\%o5
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63 \item for every other argument the stack is used
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64 \item @@@ what about floats, 64bit integers, etc.?
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65 \item results are returned in \%i0, and structs/unions pass a pointer to them as a hidden stack parameter (see below)
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66 \end{itemize}
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67
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68 \paragraph{Stack layout}
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69
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70 Stack directly after function prolog:\\
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71
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72 \begin{figure}[h]
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73 \begin{tabular}{5|3|1 1}
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74 \hhline{~-~~}
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75 & \vdots & & \\
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76 \hhline{~=~~}
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77 local data & & & \mrrbrace{10}{caller's frame} \\
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78 \hhline{~-~~}
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79 padding & & & \\
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80 \hhline{~-~~}
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81 \mrlbrace{7}{parameter area} & argument x & \mrrbrace{3}{stack parameters} & \\
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82 & \ldots & & \\
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83 & argument 6 & & \\
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84 & input argument 5 spill & \mrrbrace{3}{spill area} & \\
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85 & \ldots & & \\
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86 & input argument 0 spill & & \\
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87 & struct/union return pointer & & \\
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88 \hhline{~-~~}
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89 register save area (\%i* and \%l*) & & & \\
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90 \hhline{~=~~}
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91 local data and padding & & & \mrrbrace{3}{current frame} \\
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92 \hhline{~-~~}
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93 parameter area & & & \\
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94 \hhline{~-~~}
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95 & \vdots & & \\
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96 \hhline{~-~~}
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97 \end{tabular}
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98 \\
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99 \\
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100 \\
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101 \caption{Stack layout on sparc calling convention}
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102 \end{figure}
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103
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