--- a/doc/manual/callconvs/callconv_sparc.tex	Fri Feb 24 23:05:53 2017 +0100
+++ b/doc/manual/callconvs/callconv_sparc.tex	Mon Mar 13 11:27:05 2017 +0100
@@ -1,6 +1,6 @@
 %//////////////////////////////////////////////////////////////////////////////
 %
-% Copyright (c) 2012-2016 Daniel Adler <dadler@uni-goettingen.de>, 
+% Copyright (c) 2012-2017 Daniel Adler <dadler@uni-goettingen.de>,
 %                         Tassilo Philipp <tphilipp@potion-studios.com>
 %
 % Permission to use, copy, modify, and distribute this software for any
@@ -22,11 +22,12 @@
 \paragraph{Overview}
 
 The SPARC family of processors is based on the SPARC instruction set architecture, which comes in basically tree revisions,
-V7, V8 and V9. The former two are 32-bit whereas the latter refers to the 64-bit SPARC architecture (see next chapter). SPARC is big endian.\\
+V7, V8 and V9.\cite{SPARCRef} The former two are 32-bit whereas the latter refers to the 64-bit SPARC architecture (see next chapter).
+SPARC uses big endian byte order.\\
 
 \paragraph{\product{dyncall} support}
 
-\product{dyncall} fully supports the SPARC 32-bit instruction set (V7 and V8), \product{dyncallback} support is missing, though.
+\product{dyncall} fully supports the SPARC 32-bit instruction set (V7 and V8), for calls and callbacks.
 
 \subsubsection{SPARC (32-bit) Calling Convention}