annotate doc/manual/callconvs/callconv_ppc32.tex @ 345:c607d67cd6b8 r1.1-RC2

- doc: added syscall info to appendix, fixed broken literature link - cleanup, added missing forward declarations, ...
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date Tue, 07 Jan 2020 21:52:57 +0100
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1 %//////////////////////////////////////////////////////////////////////////////
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2 %
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3 % Copyright (c) 2007-2019 Daniel Adler <dadler@uni-goettingen.de>,
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4 % Tassilo Philipp <tphilipp@potion-studios.com>
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5 %
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6 % Permission to use, copy, modify, and distribute this software for any
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7 % purpose with or without fee is hereby granted, provided that the above
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8 % copyright notice and this permission notice appear in all copies.
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9 %
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10 % THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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11 % WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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12 % MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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13 % ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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14 % WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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15 % ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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16 % OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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17 %
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18 %//////////////////////////////////////////////////////////////////////////////
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19
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20 % ==================================================
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21 % PowerPC 32
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22 % ==================================================
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23 \subsection{PowerPC (32bit) Calling Conventions}
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24
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25 \paragraph{Overview}
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26
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27 \begin{itemize}
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28 \item Word size is 32 bits
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29 \item Big endian (MSB) and litte endian (LSB) operating modes.
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30 \item Processor operates on floats in double precision floating point arithmetc (IEEE-754) values directly (single precision is converted on the fly)
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31 \item Apple macos/Mac OS X/Darwin PPC is specified in "Mac OS X ABI Function Call Guide"\cite{ppcMacOSX}. It uses Big Endian (MSB)
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32 \item Linux PPC 32-bit ABI is specified in "LSB for PPC"\cite{ppc32LSB} which is based on "System V ABI". It uses Big Endian (MSB)
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33 \item PowerPC EABI is defined in the "PowerPC Embedded Application Binary Interface 32-Bit Implementation"\cite{ppceabi}
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34 \item There is also the "PowerOpen ABI"\cite{poabi}, a nearly identical version of it is used in AIX % more info: http://www.ingallegri.com/public/ppc.html
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35 \end{itemize}
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36
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37 \paragraph{\product{dyncall} support}
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38
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39 \product{Dyncall} and \product{dyncallback} are supported for PowerPC (32bit)
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40 Big Endian (MSB), for Darwin's and System V's calling convention.\\
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41 \product{Dyncall} can also be used to issue syscalls by using the syscall
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42 number as target parameter and selecting the correct mode.
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43
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45 \subsubsection{Mac OS X/Darwin}
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46
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47 \paragraph{Registers and register usage}
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48
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49 \begin{table}[h]
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50 \begin{tabular*}{0.95\textwidth}{3 B}
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51 Name & Brief description\\
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52 \hline
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53 {\bf gpr0} & scratch\\
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54 {\bf gpr1} & stack pointer\\
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55 {\bf gpr2} & scratch\\
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56 {\bf gpr3,gpr4} & return value, parameter 0 and 1 for integer or pointer, scratch\\
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57 {\bf gpr5-gpr10} & parameter 2-7 for integer or pointer parameters, scratch\\
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58 {\bf gpr11} & preserve\\
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59 {\bf gpr12} & branch target for dynamic code generation\\
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60 {\bf gpr13-31} & preserve\\
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61 {\bf fpr0} & scratch\\
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62 {\bf fpr1} & floating point return value, floating point parameter 0 (always double precision)\\
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63 {\bf fpr2-fpr13} & floating point parameters 1-12 (always double precision)\\
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64 {\bf fpr14-fpr31} & preserve\\
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65 {\bf v0-v1} & scratch\\
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66 {\bf v2-v13} & vector parameters\\
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67 {\bf v14-v19} & scratch\\
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68 {\bf v20-v31} & preserve\\
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69 {\bf lr} & link-register, scratch\\
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70 {\bf ctr} & count-register, scratch\\
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71 {\bf cr0-cr7} & conditional register fields, each 4-bit wide (cr0-cr1 and cr5-cr7 are scratch)\\
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72 \end{tabular*}
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73 \caption{Register usage on Darwin PowerPC 32-Bit}
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74 \end{table}
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75
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76 \paragraph{Parameter passing}
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78 \begin{itemize}
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79 \item stack grows down
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80 \item stack parameter order: right-to-left
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81 \item caller cleans up the stack
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82 \item the first 8 integer parameters are passed in registers gpr3-gpr10
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83 \item the first 13 floating point parameters are passed in registers fpr1-fpr13
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84 \item 64 bit arguments are passed as if they were two 32 bit arguments, without skipping registers for alignment (this means passing half via a register and half via the stack is allowed)
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85 \item if a float parameter is passed via a register, gpr registers are skipped for subsequent integer parameters (based on the size of
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86 the float - 1 register for single precision and 2 for double precision floating point values)
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87 \item the caller pushes subsequent parameters onto the stack
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88 \item for every parameter passed via a register, space is reserved in the stack parameter area (in order to spill the parameters if
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89 needed - e.g. varargs)
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90 \item ellipsis calls take floating point values in int and float registers (single precision floats are promoted to double precision as
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91 required by ellipsis calls)
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92 \item all nonvector parameters are aligned on 4-byte boundaries
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93 \item vector parameters are aligned on 16-byte boundaries
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94 \item composite parameters with size of 1 or 2 bytes occupy low-order bytes of their 4-byte area. INCONSISTENT with other 32-bit PPC
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95 binary interfaces. In AIX and mac OS 9, padding bytes always follow the data structure
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96 \item composite parameters 3 bytes or larger in size occupy high-order bytes
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97 \item integer parameters \textless\ 32 bit are right-justified (meaning occupy higher-address bytes) in their 4-byte slot on the stack, requiring extra-care for big-endian targets
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98 \end{itemize}
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99
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100
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101 \paragraph{Return values}
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102
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103 \begin{itemize}
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104 \item return values of integer \textless=\ 32bit or pointer type use gpr3
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105 \item 64 bit integers use gpr3 and gpr4 (hiword in gpr3, loword in gpr4)
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106 \item floating point values are returned via fpr1
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107 \item structures \textless=\ 64 bits use gpr3 and gpr4
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108 \item for types \textgreater\ 64 bits, a secret first parameter with an address to the return value is passed
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109 \end{itemize}
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110
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111
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112 \paragraph{Stack layout}
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113
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114 % verified/amended: TP nov 2019 (see also doc/disas_examples/ppc.darwin.disas)
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115 Stack frame is always 16-byte aligned. Prolog opens frame with additional, fixed space for a linkage area, to hold a number of values (not all of them are required to be saved, though). Stack directly after function prolog:\\
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116
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117 \begin{figure}[h]
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118 \begin{tabular}{5|3|1 1}
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119 & \vdots & & \\
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120 \hhline{~=~~}
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121 register save area & \hspace{4cm} & & \mrrbrace{14}{caller's frame} \\
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122 \hhline{~-~~}
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123 local data & & & \\
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124 \hhline{~-~~}
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125 \mrlbrace{6}{parameter area} & last arg & \mrrbrace{3}{stack parameters} & \\
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126 & \ldots & & \\
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127 & 9th word of arg data & & \\
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128 & gpr10 & \mrrbrace{3}{spill area (as needed)} & \\
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129 & \ldots & & \\
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130 & gpr3 & & \\
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131 \hhline{~-~~}
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132 \mrlbrace{6}{linkage area} & reserved & & \\
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133 & reserved & & \\
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134 & reserved & & \\
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135 & return address (callee saved) & & \\
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136 & condition reg (callee saved) & & \\
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137 & parent stack frame pointer & & \\
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138 \hhline{~=~~}
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139 register save area & & & \mrrbrace{4}{current frame} \\
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140 \hhline{~-~~}
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141 local data & & & \\
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142 \hhline{~-~~}
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143 parameter area & & & \\
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144 \hhline{~-~~}
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145 linkage area & \vdots & & \\
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146 \end{tabular}
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147 \caption{Stack layout on ppc32 Darwin}
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148 \end{figure}
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149
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151 \newpage
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153
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154 \subsubsection{System V PPC 32-bit}
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155
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156 \paragraph{Status}
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157
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158 \paragraph{Registers and register usage}
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159
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160 \begin{table}[h]
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161 \begin{tabular*}{0.95\textwidth}{3 B}
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162 Name & Brief description\\
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163 \hline
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164 {\bf r0} & scratch\\
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165 {\bf r1} & stack pointer, preserve\\
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166 {\bf r2} & system-reserved\\
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167 {\bf r3-r4} & parameter passing and return value, scratch\\
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168 {\bf r5-r10} & parameter passing, scratch\\
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169 {\bf r11-r12} & scratch\\
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170 {\bf r13} & small data area pointer register\\
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171 {\bf r14-r30} & local variables, preserve\\
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172 {\bf r31} & used for local variables or \emph{environment pointer}, preserve\\
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173 {\bf f0} & scratch\\
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174 {\bf f1} & parameter passing and return value, scratch\\
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175 {\bf f2-f8} & parameter passing, scratch\\
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176 {\bf f9-13} & scratch\\
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177 {\bf f14-f31} & local variables, preserve\\
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178 {\bf cr0-cr7} & conditional register fields, each 4-bit wide (cr0-cr1 and cr5-cr7 are scratch)\\
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179 {\bf lr} & link register, scratch\\
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180 {\bf ctr} & count register, scratch \\
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181 {\bf xer} & fixed-point exception register, scratch\\
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182 {\bf fpscr} & floating-point Status and Control Register\\
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183 % {\bf v0-v1} & scratch\\
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184 % {\bf v2-v13} & vector parameters\\
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185 % {\bf v14-v19} & scratch\\
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186 % {\bf v20-v31} & permanent\\
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187 % {\bf lr} & scratch, link-register\\
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188 % {\bf ctr} & scratch, count-register\\
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189 % {\bf cr0-cr1} & scratch\\
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190 % {\bf cr2-cr4} & permanent\\
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191 % {\bf cr5-cr7} & scratch\\
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192 \end{tabular*}
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193 \caption{Register usage on System V ABI PowerPC Processor}
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194 \end{table}
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195
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196 \paragraph{Parameter passing}
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197
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198 \begin{itemize}
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199 \item Stack pointer (r1) is always 16-byte aligned. The EABI differs here - it is 8-byte alignment.
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200 \item 8 general-purpose registers (r3-r10) for integer and pointer types.
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201 \item 8 floating-pointer registers (f1-f8) for float (promoted to double) and double types.
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202 \item Additional arguments are passed on the stack directly after the back-chain and saved return address (8 bytes structure) on the callers stack frame.
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203 \item 64-bit integer data types are passed in general-purpose registers as a whole in two
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204 32-bit general purpose registers (an odd and an even e.g. r3 and r4), skipping an even integer register
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205 or passed on the stack; they are never splitted into a register and stack part
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206 \item Ellipse calls set CR bit 6
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207 \item integer parameters \textless\ 32 bit are right-justified (meaning occupy high-order bytes) in their 4-byte area, requiring extra-care for big-endian targets
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208 \item no spill area is used on stack, iterating over varargs requires a specific va\_list implementation
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209 \end{itemize}
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210
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211 \paragraph{Return values}
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212
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213 \begin{itemize}
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214 \item 32-bit integers use register r3, 64-bit use registers r3 and r4 (hiword in r3, loword in r4).
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215 \item floating-point values are returned using register f1.
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216 \end{itemize}
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217
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218
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219 \paragraph{Stack layout}
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220
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221 % verified/amended: TP nov 2019 (see also doc/disas_examples/ppc.sysv.disas)
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222 Stack frame is always 16-byte aligned. Stack directly after function prolog:\\
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223
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224 \begin{figure}[h]
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225 \begin{tabular}{5|3|1 1}
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226 & \vdots & & \\
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227 \hhline{~=~~}
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228 register save area & \hspace{4cm} & & \mrrbrace{7}{caller's frame} \\
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229 \hhline{~-~~}
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230 local data & & & \\
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231 \hhline{~-~~}
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232 \mrlbrace{3}{parameter area} & last arg & \mrrbrace{3}{stack parameters} & \\
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233 & \ldots & & \\
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234 & first arg passed via stack & & \\
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235 \hhline{~-~~}
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236 & return address (callee saved) & & \\
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237 \hhline{~-~~}
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238 & parent stack frame pointer & & \\
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239 \hhline{~=~~}
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240 register save area & & & \mrrbrace{4}{current frame} \\
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241 \hhline{~-~~}
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242 local data & & & \\
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243 \hhline{~-~~}
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244 parameter area & & & \\
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245 \hhline{~-~~}
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246 & \vdots & & \\
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247 \end{tabular}
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248 \caption{Stack layout on System V ABI for PowerPC 32-bit calling convention}
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249 \end{figure}
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250
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251
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252 \newpage
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253
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254 \subsubsection{System V syscalls}
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255
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256 \paragraph{Parameter passing}
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257
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258 \begin{itemize}
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259 \item syscall is issued via the {\em sc} instruction
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260 \item kernel destroys registers r13
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261 \item syscall number is set in r0
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262 \item params are passed in registers r3 through r10
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263 \item no stack in use, meaning syscalls are in theory limited to eight arguments
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264 \item register r3 holds the return value, overflow flag in conditional register cr0 signals errors in syscall
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265 \end{itemize}
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266