Mercurial > pub > dyncall > dyncall
comparison doc/manual/callconvs/callconv_sparc.tex @ 0:3e629dc19168
initial from svn dyncall-1745
author | Daniel Adler |
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date | Thu, 19 Mar 2015 22:24:28 +0100 |
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children | 7ca46969e0ad |
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1 %////////////////////////////////////////////////////////////////////////////// | |
2 % | |
3 % Copyright (c) 2012 Daniel Adler <dadler@uni-goettingen.de>, | |
4 % Tassilo Philipp <tphilipp@potion-studios.com> | |
5 % | |
6 % Permission to use, copy, modify, and distribute this software for any | |
7 % purpose with or without fee is hereby granted, provided that the above | |
8 % copyright notice and this permission notice appear in all copies. | |
9 % | |
10 % THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
11 % WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
12 % MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
13 % ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
14 % WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
15 % ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
16 % OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
17 % | |
18 %////////////////////////////////////////////////////////////////////////////// | |
19 | |
20 \subsection{SPARC Calling Convention} | |
21 | |
22 \paragraph{Overview} | |
23 | |
24 The SPARC family of processors is based on the SPARC instruction set architecture, which comes in basically tree revisions, | |
25 V7, V8 and V9. The former two are 32-bit whereas the latter refers to the 64-bit SPARC architecture (see next chapter). SPARC is big endian. | |
26 | |
27 \paragraph{\product{dyncall} support} | |
28 | |
29 \product{dyncall} fully supports the SPARC 32-bit instruction set (V7 and V8), \product{dyncallback} support is missing, though. | |
30 | |
31 \subsubsection{SPARC (32-bit) Calling Convention} | |
32 | |
33 \paragraph{Register usage} | |
34 | |
35 \begin{itemize} | |
36 \item 32 32-bit integer/pointer registers | |
37 \item 32 floating point registers (usable as 8 quad precision, 16 double precision or 32 single precision registers) | |
38 \item 32 registers are accessible at a time (8 are global ones (g*), whereas the rest forms a register window with 8 input (i*), 8 output (o*) and 8 local (l*) ones) | |
39 \item invoking a function shifts the register window, the old output registers become the new input registers (old local and input ones are not accessible anymore) | |
40 \end{itemize} | |
41 | |
42 \begin{table}[h] | |
43 \begin{tabular}{lll} | |
44 \hline | |
45 Name & Alias & Brief description\\ | |
46 \hline | |
47 {\bf \%g0} & & Read-only, hardwired to 0 \\ | |
48 {\bf \%g1-\%g7} & & Global \\ | |
49 {\bf \%o0 and \%i0} & & Output and input argument 0, return value \\ | |
50 {\bf \%o1-\%o5 and \%i1-\%i5} & & Output and input argument registers \\ | |
51 {\bf \%o6 and \%i6} & & Stack and frame pointer \\ | |
52 {\bf \%o7 and \%i7} & & Return address (caller writes to o7, callee uses i7) \\ | |
53 \end{tabular} | |
54 \caption{Register usage on sparc calling convention} | |
55 \end{table} | |
56 | |
57 \paragraph{Parameter passing} | |
58 \begin{itemize} | |
59 \item Stack parameter order: right-to-left @@@ really? | |
60 \item Caller cleans up the stack @@@ really? | |
61 \item Stack always aligned to 8 bytes. | |
62 \item first 6 integers and floats are passed independently in registers using \%o0-\%o5 | |
63 \item for every other argument the stack is used | |
64 \item @@@ what about floats, 64bit integers, etc.? | |
65 \item results are returned in \%i0, and structs/unions pass a pointer to them as a hidden stack parameter (see below) | |
66 \end{itemize} | |
67 | |
68 \paragraph{Stack layout} | |
69 | |
70 Stack directly after function prolog:\\ | |
71 | |
72 \begin{figure}[h] | |
73 \begin{tabular}{5|3|1 1} | |
74 \hhline{~-~~} | |
75 & \vdots & & \\ | |
76 \hhline{~=~~} | |
77 local data & & & \mrrbrace{10}{caller's frame} \\ | |
78 \hhline{~-~~} | |
79 padding & & & \\ | |
80 \hhline{~-~~} | |
81 \mrlbrace{7}{parameter area} & argument x & \mrrbrace{3}{stack parameters} & \\ | |
82 & \ldots & & \\ | |
83 & argument 6 & & \\ | |
84 & input argument 5 spill & \mrrbrace{3}{spill area} & \\ | |
85 & \ldots & & \\ | |
86 & input argument 0 spill & & \\ | |
87 & struct/union return pointer & & \\ | |
88 \hhline{~-~~} | |
89 register save area (\%i* and \%l*) & & & \\ | |
90 \hhline{~=~~} | |
91 local data and padding & & & \mrrbrace{3}{current frame} \\ | |
92 \hhline{~-~~} | |
93 parameter area & & & \\ | |
94 \hhline{~-~~} | |
95 & \vdots & & \\ | |
96 \hhline{~-~~} | |
97 \end{tabular} | |
98 \\ | |
99 \\ | |
100 \\ | |
101 \caption{Stack layout on sparc calling convention} | |
102 \end{figure} | |
103 |