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- review and fixes, cleanup, amendments to calling convention appendix of manual
author Tassilo Philipp
date Fri, 22 Nov 2019 23:11:56 +0100
parents a1fcb3e02270
children b47168dacba6
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1 %//////////////////////////////////////////////////////////////////////////////
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2 %
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3 % Copyright (c) 2007-2019 Daniel Adler <dadler@uni-goettingen.de>,
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4 % Tassilo Philipp <tphilipp@potion-studios.com>
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5 %
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6 % Permission to use, copy, modify, and distribute this software for any
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7 % purpose with or without fee is hereby granted, provided that the above
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8 % copyright notice and this permission notice appear in all copies.
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9 %
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10 % THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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11 % WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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12 % MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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13 % ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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14 % WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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15 % ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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16 % OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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17 %
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18 %//////////////////////////////////////////////////////////////////////////////
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19
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20 \subsection{MIPS32 Calling Conventions}
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21
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22 \paragraph{Overview}
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23
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24 Multiple revisions of the MIPS Instruction set exist, namely MIPS I, MIPS II, MIPS III, MIPS IV, MIPS32 and MIPS64.
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25 Nowadays, MIPS32 and MIPS64 are the main ones used for 32-bit and 64-bit instruction sets, respectively.\\
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26 Given MIPS processors are often used for embedded devices, several add-on extensions exist for the MIPS family, for example:
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27
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28 \begin{description}
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29 \item [MIPS-3D] simple floating-point SIMD instructions dedicated to common 3D tasks.
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30 \item [MDMX] (MaDMaX) more extensive integer SIMD instruction set using 64 bit floating-point registers.
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31 \item [MIPS16e] adds compression to the instruction stream to make programs take up less room (allegedly a response to the THUMB instruction set of the ARM architecture).
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32 \item [MIPS MT] multithreading additions to the system similar to HyperThreading.
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33 \end{description}
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34
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35 Unfortunately, there is actually no such thing as "The MIPS Calling Convention". Many possible conventions are used
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36 by many different environments such as \emph{O32}\cite{MIPSo32}, \emph{O64}\cite{MIPSo64}, \emph{N32}\cite{MIPSn32/n64}, \emph{N64}\cite{MIPSn32/n64}, \emph{EABI}\cite{MIPSeabi} and \emph{NUBI}\cite{MIPSnubi}.\\
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37
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38 \paragraph{\product{dyncall} support}
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39
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40 Currently, dyncall supports for MIPS 32-bit architectures the widely-used O32 calling convention (for all four combinations of big/little-endian, and soft/hard-float targets),
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41 as well as EABI (little-endian/hard-float, which is used on the Homebrew SDK for the Playstation Portable). \product{dyncall} currently does not support MIPS16e
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42 (contrary to the like-minded ARM-THUMB, which is supported). Both, calls and callbacks are supported.
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43
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44
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45 \newpage
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46
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47
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48 \subsubsection{MIPS EABI 32-bit Calling Convention}
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49
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50 % This is about hardware floating point targtes, there are also softfloat ones @@@
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51
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52 \paragraph{Register usage}
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53
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54 \begin{table}[h]
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55 \begin{tabular*}{0.95\textwidth}{lll}
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56 Name & Alias & Brief description\\
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57 \hline
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58 {\bf \$0} & {\bf \$zero} & hardware zero, scratch \\
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59 {\bf \$1} & {\bf \$at} & assembler temporary, scratch \\
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60 {\bf \$2-\$3} & {\bf \$v0-\$v1} & integer results, scratch \\
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61 {\bf \$4-\$11} & {\bf \$a0-\$a7} & integer arguments, or double precision float arguments, scratch \\
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62 {\bf \$12-\$15,\$24} & {\bf \$t4-\$t7,\$t8} & integer temporaries, scratch \\
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63 {\bf \$25} & {\bf \$t9} & integer temporary, address of callee for PIC calls (by convention), scratch \\
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64 {\bf \$16-\$23} & {\bf \$s0-\$s7} & preserve \\
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65 {\bf \$26,\$27} & {\bf \$kt0,\$kt1} & reserved for kernel \\
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66 {\bf \$28} & {\bf \$gp} & global pointer, preserve \\
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67 {\bf \$29} & {\bf \$sp} & stack pointer, preserve \\
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68 {\bf \$30} & {\bf \$s8/\$fp} & frame pointer (some assemblers name it \$fp), preserve \\
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69 {\bf \$31} & {\bf \$ra} & return address, preserve \\
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70 {\bf hi, lo} & & multiply/divide special registers \\
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71 {\bf \$f0,\$f2} & & float results, scratch \\
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72 {\bf \$f1,\$f3,\$f4-\$f11,\$f20-\$f23} & & float temporaries, scratch \\
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73 {\bf \$f12-\$f19} & & single precision float arguments, scratch \\
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74 \end{tabular*}
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75 \caption{Register usage on MIPS32 EABI calling convention}
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76 \end{table}
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77
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78 \paragraph{Parameter passing}
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79
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80 \begin{itemize}
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81 \item Stack grows down
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82 \item Stack parameter order: right-to-left
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83 \item Caller cleans up the stack
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84 \item first 8 integers (\textless=\ 32bit) are passed in registers \$a0-\$a7
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85 \item first 8 single precision floating point arguments are passed in registers \$f12-\$f19
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86 \item 64-bit stack arguments are always aligned to 8 bytes
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87 \item 64-bit integers or double precision floats are passed in two general purpose registers starting at an even register number, skipping one odd register
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88 \item if either integer or float registers are used up, the stack is used
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89 \item if the callee takes the address of one of the parameters and uses it to address other unnamed parameters (e.g. varargs) it has to copy - in its prolog - the the argument registers to a reserved stack area adjacent to the other parameters on the stack (only the unnamed integer parameters require saving, though) % @@@ seems to *ONLY* spill with varargs, never for any other reason
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90 \item float registers don't seem to ever need to be saved that way, because floats passed to an ellipsis function are promoted to doubles, which in turn are passed in a? register pairs, so only \$a0-\$a7 are need to be spilled
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91 \item results are returned in \$v0 (32-bit), \$v0 and \$v1 (64-bit), \$f0 or \$f0 and \$f2 (2 $\times$ 32 bit float e.g. complex)
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92 \end{itemize}
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93
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94 \paragraph{Stack layout}
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95
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96 % verified/amended: TP nov 2019 (see also doc/disas_examples/mips.eabi.disas)
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97 Stack directly after function prolog:\\
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98
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99 \begin{figure}[h]
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100 \begin{tabular}{5|3|1 1}
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101 & \vdots & & \\
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102 \hhline{~=~~}
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103 register save area & \hspace{4cm} & & \mrrbrace{5}{caller's frame} \\
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104 \hhline{~-~~}
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105 local data & & & \\
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106 \hhline{~-~~}
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107 \mrlbrace{6}{parameter area} & last arg & \mrrbrace{3}{stack parameters} & \\
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108 & \ldots & & \\
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109 & first arg passed via stack & & \\
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110 \hhline{~=~~}
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111 & \$a7 & \mrrbrace{3}{spill area (if needed)} & \mrrbrace{6}{current frame} \\
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112 & \ldots & & \\
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113 & \$a? (first unnamed reg) & & \\
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114 \hhline{~-~~}
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115 register save area (with return address) & & & \\
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116 \hhline{~-~~}
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117 local data & & & \\
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118 \hhline{~-~~}
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119 parameter area & \vdots & & \\
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120 \end{tabular}
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121 \caption{Stack layout on MIPS EABI 32-bit calling convention}
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122 \end{figure}
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123
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124
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125 \newpage
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126
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127
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128 \subsubsection{MIPS O32 32-bit Calling Convention}
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129
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130 \paragraph{Register usage}
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131
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132 \begin{table}[h]
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133 \begin{tabular*}{0.95\textwidth}{lll}
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134 Name & Alias & Brief description\\
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135 \hline
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136 {\bf \$0} & {\bf \$zero} & hardware zero \\
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137 {\bf \$1} & {\bf \$at} & assembler temporary \\
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138 {\bf \$2-\$3} & {\bf \$v0-\$v1} & return value (only integer on hard-float targets), scratch \\
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139 {\bf \$4-\$7} & {\bf \$a0-\$a3} & first arguments (only integer on hard-float targets), scratch\\
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140 {\bf \$8-\$15,\$24} & {\bf \$t0-\$t7,\$t8} & temporaries, scratch \\
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141 {\bf \$25} & {\bf \$t9} & temporary, holds address of called function for PIC calls (by convention) \\
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142 {\bf \$16-\$23} & {\bf \$s0-\$s7} & preserved \\
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143 {\bf \$26,\$27} & {\bf \$k0,\$k1} & reserved for kernel \\
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144 {\bf \$28} & {\bf \$gp} & global pointer, preserved by caller \\
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145 {\bf \$29} & {\bf \$sp} & stack pointer, preserve \\
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146 {\bf \$30} & {\bf \$s8/\$fp} & frame pointer (some assemblers name it \$fp), preserve \\
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147 {\bf \$31} & {\bf \$ra} & return address, preserve \\
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148 {\bf hi, lo} & & multiply/divide special registers \\
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149 {\bf \$f0-\$f3} & & only on hard-float targets: float return value, scratch \\
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150 {\bf \$f4-\$f11,\$f16-\$f19} & & only on hard-float targets: float temporaries, scratch \\
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151 {\bf \$f12-\$f15} & & only on hard-float targets: first floating point arguments, scratch \\
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152 {\bf \$f20-\$f31} & & only on hard-float targets: preserved \\
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153 \end{tabular*}
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154 \caption{Register usage on MIPS O32 calling convention}
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155 \end{table}
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156
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157 \paragraph{Parameter passing}
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158
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159 \begin{itemize}
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160 \item Stack grows down
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161 \item Stack parameter order: right-to-left
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162 \item Caller cleans up the stack
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163 \item Caller is required to always leave a 16-byte spill area for \$a0-\$a3 at the end of {\bf its} frame, to be used and spilled to by the callee, if needed
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164 \item The different stack areas (local data, register save area, parameter area) are each aligned to 8 bytes
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165 \item generally, first four 32bit arguments are passed in registers \$a0-\$a3, respectively (only on hard-float targets: see below for exceptions if first arg is a float)
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166 \item subsequent parameters are passed vie the stack
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167 \item 64-bit params passed via registers are passed using either two registers (starting at an even register number, skipping an odd one if necessary), or via the stack using an 8-byte alignment
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168 \item only on hard-float targets: if the very first call argument is a float, up to 2 floats or doubles can be passed via \$f12 and \$f14, respectively, for first and second argument
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169 \item only on hard-float targets: if any arguments are passed via float registers, skip \$a0-\$a3 for subsequent arguments as if the values were passed via them
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170 \item only on hard-float targets: note that if the first argument is not a float, but the second, it'll get passed via the \$a? registers
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171 \item results are returned in \$v0 and \$v1, with \$v0 for all values \textless\ 64bit (only integer on hard-float targets)
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172 \item only on hard-float targets: floating point results are returned in \$f0 (32-bit float), or \$f0 and \$f3 (64bit float)
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173 \item single precision float parameters (32 bit) are right-justified in their 8-byte slot on the stack on big endian targets, as they aren't promoted @@@
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174 \end{itemize}
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175
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176 \paragraph{Stack layout}
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177
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178 % verified/amended: TP nov 2019 (see also doc/disas_examples/mips.o32.disas)
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179 Stack directly after function prolog:\\
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180
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181 \begin{figure}[h]
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182 \begin{tabular}{5|3|1 1}
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183 & \vdots & & \\
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184 \hhline{~=~~}
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185 register save area (with return address) & \hspace{4cm} & & \mrrbrace{10}{caller's frame} \\
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186 \hhline{~-~~}
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187 local data (and padding) & & & \\
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188 \hhline{~-~~}
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189 \mrlbrace{8}{parameter area} & padding (if needed) & & \\
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190 & last arg & \mrrbrace{3}{stack parameters} & \\
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191 & \ldots & & \\
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192 & first arg passed via stack & & \\
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193 & \$a3 & \mrrbrace{4}{spill area} & \\
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194 & \$a2 & & \\
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195 & \$a1 & & \\
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196 & \$a0 & & \\
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197 \hhline{~=~~}
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198 register save area & & & \mrrbrace{3}{current frame} \\
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199 \hhline{~-~~}
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200 local data & & & \\
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201 \hhline{~-~~}
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202 parameter area & \vdots & & \\
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203 \end{tabular}
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204 \caption{Stack layout on MIPS O32 calling convention}
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205 \end{figure}
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206
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207 \newpage
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208