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comparison doc/manual/callconvs/callconv_arm32.tex @ 486:d160046da104

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doc cleanup: removed outdated/wrong info and fixed wrong value size specs
author Tassilo Philipp
date Thu, 17 Mar 2022 17:56:44 +0100
parents 0fc22b5feac7
children 75cb8f79d725
comparison
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485:0c68b3f91367 486:d160046da104
139 139
140 \subsubsection{ATPCS THUMB mode} 140 \subsubsection{ATPCS THUMB mode}
141 141
142 142
143 \paragraph{Status} 143 \paragraph{Status}
144
145 \begin{itemize}
146 \item The ATPCS THUMB mode is untested.
147 \item Ellipsis calls may not work.
148 \item C++ this calls do not work.
149 \end{itemize}
150 144
151 \paragraph{Registers and register usage} 145 \paragraph{Registers and register usage}
152 146
153 In THUMB mode, the ARM32 processor family supports eight 32 bit general purpose registers r0-r7 and access to high order registers r8-r15:\\ 147 In THUMB mode, the ARM32 processor family supports eight 32 bit general purpose registers r0-r7 and access to high order registers r8-r15:\\
154 \\ 148 \\