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comparison doc/manual/callconvs/callconv_sparc64.tex @ 194:41d6945f5858

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- sparc doc improvements (esp. for sparc64)
author Tassilo Philipp
date Sat, 18 Mar 2017 19:08:45 +0100
parents 600bd90afdb7
children 53c42b1d9f8b
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193:600bd90afdb7 194:41d6945f5858
22 \paragraph{Overview} 22 \paragraph{Overview}
23 23
24 The SPARC family of processors is based on the SPARC instruction set architecture, which comes in basically tree revisions, 24 The SPARC family of processors is based on the SPARC instruction set architecture, which comes in basically tree revisions,
25 V7, V8\cite{SPARCV8}\cite{SPARCSysV} and V9\cite{SPARCV9}\cite{SPARCV9SysV}. The former two are 32-bit (see previous chapter) whereas the latter refers to the 64-bit SPARC architecture. 25 V7, V8\cite{SPARCV8}\cite{SPARCSysV} and V9\cite{SPARCV9}\cite{SPARCV9SysV}. The former two are 32-bit (see previous chapter) whereas the latter refers to the 64-bit SPARC architecture.
26 SPARC uses big endian byte order, however, V9 supports also little endian byte order, but for data access only, not instruction access.\\ 26 SPARC uses big endian byte order, however, V9 supports also little endian byte order, but for data access only, not instruction access.\\
27 \\
28 There are two probosals, one from Sun and one from Hal, which disagree on how to handle some aspects of this calling convention.\\
27 29
28 \paragraph{\product{dyncall} support} 30 \paragraph{\product{dyncall} support}
29 31
30 \product{dyncall} fully supports the SPARC 64-bit instruction set (V9), for calls and callbacks. 32 \product{dyncall} fully supports the SPARC 64-bit instruction set (V9), for calls and callbacks.
31 33
32 \subsubsection{SPARC (64-bit) Calling Convention} 34 \subsubsection{SPARC (64-bit) Calling Convention}
33 35
34 @@@ finish 36 \begin{itemize}
37 \item 32 double precision floating point registers (d0,d2,d4,...,d62, usable as 16 quad precision ones q0,q4,q8,...g60, and also first half of them are usable as 32 single precision registers f0-f31)
38 \item 32 64-bit integer/pointer registers out of a bigger (vendor/model dependent) number that are accessible at a time (8 are global ones (g*), whereas the remaining 24 form a register window with 8 input (i*), 8 output (o*) and 8 local (l*) ones)
39 \item calling a function shifts the register window, the old output registers become the new input registers (old local and input ones are not accessible anymore)
40 \item stack and frame pointer are offset by a BIAS of 2047 (see official doc for reasons)
41 \end{itemize}
42
43 \begin{table}[h]
44 \begin{tabular*}{0.95\textwidth}{lll}
45 Name & Alias & Brief description\\
46 \hline
47 {\bf \%g0} & \%r0 & Read-only, hardwired to 0 \\
48 {\bf \%g1-\%g7} & \%r1-\%r7 & Global \\
49 {\bf \%o0-\%o3 and \%i0-\%i3} & \%r8-\%r11 and \%r24-\%r27 & Output and input argument registers, return value \\
50 {\bf \%o4,\%o5 and \%i4,\%i5} & \%r12,\%r13 and \%r28,\%r29 & Output and input argument registers \\
51 {\bf \%o6 and \%i6} & \%r14 and \%r30, \%sp and \%fp & Stack and frame pointer (NOTE, value is pointing to stack/frame minus a BIAS of 2047) \\
52 {\bf \%o7 and \%i7} & \%r15 and \%r31 & Return address (caller writes to o7, callee uses i7) \\
53 {\bf \%l0-\%l7} & \%r16-\%r23 & preserve \\
54 {\bf \%d0,\%d2,\%d4,\%d6} & & Floating point arguments, return value \\
55 {\bf \%d8,\%d10,...,\%d30} & & Floating point arguments \\
56 {\bf \%d32,\%d36,...,\%d62} & & scratch (but, according do Hal, \%d16,...,\%d46 are preserved) \\
57 \end{tabular*}
58 \caption{Register usage on sparc64 calling convention}
59 \end{table}
60
61 \paragraph{Parameter passing}
62 \begin{itemize}
63 \item stack grows down
64 \item stack parameter order: right-to-left
65 \item caller cleans up the stack
66 \item stack always aligned to 8 bytes
67 \item first 6 integers are passed in registers using \%o0-\%o5
68 \item first 8 quad precision floating point args (or 16 double precision, or 32 single precision) are passed in floating point registers (\%q0,\%q4,...,\%q28 or \%d0,\%d2,...,\%d30 or \%f0-\%f32, respectively)
69 \item for every other argument the stack is used
70 \item for every floating point argument passed in a register, corresponding \%o* registers or stack space is skipped (e.g. if \%d0 is used for 3rd call argument, \%o2 is skipped and not used for subsequent integer arguments)
71 \item all arguments \textless=\ 64 bit are passed as 64 bit values
72 \item minimum stack size is 128 bytes, b/c stack pointer must always point at enough space to store all \%i* and \%l* registers, used when running out of register windows
73 \item if needed, register spill area (for integer arguments passed via \%o0-\%o5) is adjacent to parameters
74 \item results are expected by caller to be returned in \%o0-\%o3 (after reg window restore, meaning callee writes to \%i0-\%i3) for integers, \%d0,\%d2,\%d4,\%d6 for floats, and for structs/unions a pointer to them is used as a hidden stack parameter (see below)
75 \end{itemize}
76
77 \paragraph{Stack layout}
78
79 Stack directly after function prolog:\\
80
81 \begin{figure}[h]
82 \begin{tabular}{5|3|1 1}
83 \hhline{~-~~}
84 & \vdots & & \\
85 \hhline{~=~~}
86 local data & \hspace{4cm} & & \mrrbrace{10}{caller's frame} \\
87 \hhline{~-~~}
88 \mrlbrace{7}{parameter area} & argument x & \mrrbrace{3}{stack parameters} & \\
89 & \ldots & & \\
90 & argument 6 & & \\
91 & input argument 5 spill & \mrrbrace{3}{spill area} & \\
92 & \ldots & & \\
93 & input argument 0 spill & & \\
94 & struct/union return pointer & & \\
95 \hhline{~-~~}
96 register save area (\%i* and \%l*) & & & \\
97 \hhline{~=~~}
98 local data & & & \mrrbrace{3}{current frame} \\
99 \hhline{~-~~}
100 parameter area & & & \\
101 \hhline{~-~~}
102 & \vdots & & \\
103 \hhline{~-~~}
104 \end{tabular}
105 \\
106 \\
107 \\
108 \caption{Stack layout on sparc64 calling convention}
109 \end{figure}
110