Mercurial > pub > dyncall > dyncall
comparison doc/manual/callconvs/callconv_mips.tex @ 0:3e629dc19168
initial from svn dyncall-1745
author | Daniel Adler |
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date | Thu, 19 Mar 2015 22:24:28 +0100 |
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children | 7ca46969e0ad |
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1 %////////////////////////////////////////////////////////////////////////////// | |
2 % | |
3 % Copyright (c) 2007,2009 Daniel Adler <dadler@uni-goettingen.de>, | |
4 % Tassilo Philipp <tphilipp@potion-studios.com> | |
5 % | |
6 % Permission to use, copy, modify, and distribute this software for any | |
7 % purpose with or without fee is hereby granted, provided that the above | |
8 % copyright notice and this permission notice appear in all copies. | |
9 % | |
10 % THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
11 % WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
12 % MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
13 % ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
14 % WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
15 % ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
16 % OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
17 % | |
18 %////////////////////////////////////////////////////////////////////////////// | |
19 | |
20 \subsection{MIPS Calling Convention} | |
21 | |
22 \paragraph{Overview} | |
23 | |
24 The MIPS family of processors is based on the MIPS processor architecture. | |
25 Multiple revisions of the MIPS Instruction set exist, namely MIPS I, MIPS II, MIPS III, MIPS IV, MIPS32 and MIPS64. | |
26 Today, MIPS32 and MIPS64 for 32-bit and 64-bit respectively.\\ | |
27 Several add-on extensions exist for the MIPS family: | |
28 | |
29 \begin{description} | |
30 \item [MIPS-3D] simple floating-point SIMD instructions dedicated to common 3D tasks. | |
31 \item [MDMX] (MaDMaX) more extensive integer SIMD instruction set using 64 bit floating-point registers. | |
32 \item [MIPS16e] adds compression to the instruction stream to make programs take up less room (allegedly a response to the THUMB instruction set of the ARM architecture). | |
33 \item [MIPS MT] multithreading additions to the system similar to HyperThreading. | |
34 \end{description} | |
35 | |
36 Unfortunately, there is actually no such thing as "The MIPS Calling Convention". Many possible conventions are used | |
37 by many different environments such as \emph{32}, \emph{O64}, \emph{N32}, \emph{64} and \emph{EABI}. | |
38 | |
39 \paragraph{\product{dyncall} support} | |
40 | |
41 Currently, dyncall supports the EABI calling convention which is used on the Homebrew SDK for the Playstation Portable. | |
42 As documentation for this EABI is unofficial, this port is currently experimental. | |
43 | |
44 \subsubsection{MIPS EABI 32-bit Calling Convention} | |
45 | |
46 \paragraph{Register usage} | |
47 | |
48 \begin{table}[h] | |
49 \begin{tabular}{lll} | |
50 \hline | |
51 Name & Alias & Brief description\\ | |
52 \hline | |
53 {\bf \$0} & {\bf \$zero} & Hardware zero \\ | |
54 {\bf \$1} & {\bf \$at} & Assembler temporary \\ | |
55 {\bf \$2-\$3} & {\bf \$v0-\$v1} & Integer results \\ | |
56 {\bf \$4-\$11} & {\bf \$a0-\$a7} & Integer arguments\\ | |
57 {\bf \$12-\$15,\$24,\$25} & {\bf \$t4-\$t7,\$t8,\$t9} & Integer temporaries \\ | |
58 {\bf \$25} & {\bf \$t9} & Integer temporary, hold the address of the called function for all PIC calls (by convention) \\ | |
59 {\bf \$16-\$23} & {\bf \$s0-\$s7} & Preserved \\ | |
60 {\bf \$26,\$27} & {\bf \$kt0,\$kt1} & Reserved for kernel \\ | |
61 {\bf \$28} & {\bf \$gp} & Global pointer \\ | |
62 {\bf \$29} & {\bf \$sp} & Stack pointer \\ | |
63 {\bf \$30} & {\bf \$s8} & Frame pointer \\ | |
64 {\bf \$31} & {\bf \$ra} & Return address \\ | |
65 {\bf hi, lo} & & Multiply/divide special registers \\ | |
66 {\bf \$f0,\$f2} & & Float results \\ | |
67 {\bf \$f1,\$f3,\$f4-\$f11,\$f20-\$f23} & & Float temporaries \\ | |
68 {\bf \$f12-\$f19} & & Float arguments \\ | |
69 \end{tabular} | |
70 \caption{Register usage on mips32 eabi calling convention} | |
71 \end{table} | |
72 | |
73 \paragraph{Parameter passing} | |
74 | |
75 \begin{itemize} | |
76 \item Stack parameter order: right-to-left | |
77 \item Caller cleans up the stack | |
78 \item Stack always aligned to 8 bytes. | |
79 \item first 8 integers and floats are passed independently in registers using \$a0-\$a7 and \$f12-\$f19, respectively. | |
80 \item if either integer or float registers are consumed up, the stack is used. | |
81 \item 64-bit floats and integers are passed on two integer registers starting at an even register number, probably skipping one odd register. | |
82 \item \$a0-\$a7 and \$f12-\$f19 are not required to be preserved. | |
83 \item results are returned in \$v0 (32-bit integer), \$v0 and \$v1 (64-bit integer/float), \$f0 (32 bit float) and \$f0 and \$f2 (2 $\times$ 32 bit float e.g. complex). | |
84 \end{itemize} | |
85 | |
86 \paragraph{Stack layout} | |
87 | |
88 Stack directly after function prolog:\\ | |
89 | |
90 \begin{figure}[h] | |
91 \begin{tabular}{5|3|1 1} | |
92 \hhline{~-~~} | |
93 & \vdots & & \\ | |
94 \hhline{~=~~} | |
95 register save area & & & \mrrbrace{5}{caller's frame} \\ | |
96 \hhline{~-~~} | |
97 local data & & & \\ | |
98 \hhline{~-~~} | |
99 \mrlbrace{3}{parameter area} & \ldots & \mrrbrace{3}{stack parameters} & \\ | |
100 & \ldots & & \\ | |
101 & \ldots & & \\ | |
102 \hhline{~=~~} | |
103 register save area (with return address) & & & \mrrbrace{5}{current frame} \\ | |
104 \hhline{~-~~} | |
105 local data & & & \\ | |
106 \hhline{~-~~} | |
107 parameter area & & & \\ | |
108 \hhline{~-~~} | |
109 & \vdots & & \\ | |
110 \hhline{~-~~} | |
111 \end{tabular} | |
112 \\ | |
113 \\ | |
114 \\ | |
115 \caption{Stack layout on mips32 eabi calling convention} | |
116 \end{figure} | |
117 |