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- review and fixes, cleanup, amendments to calling convention appendix of manual
author Tassilo Philipp
date Fri, 22 Nov 2019 23:11:56 +0100
parents e07fb0bbddae
children 4e6f63b7020e
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327:c0390dc85a07 328:276eb8c87aa0
1 %////////////////////////////////////////////////////////////////////////////// 1 %//////////////////////////////////////////////////////////////////////////////
2 % 2 %
3 % Copyright (c) 2012-2017 Daniel Adler <dadler@uni-goettingen.de>, 3 % Copyright (c) 2012-2019 Daniel Adler <dadler@uni-goettingen.de>,
4 % Tassilo Philipp <tphilipp@potion-studios.com> 4 % Tassilo Philipp <tphilipp@potion-studios.com>
5 % 5 %
6 % Permission to use, copy, modify, and distribute this software for any 6 % Permission to use, copy, modify, and distribute this software for any
7 % purpose with or without fee is hereby granted, provided that the above 7 % purpose with or without fee is hereby granted, provided that the above
8 % copyright notice and this permission notice appear in all copies. 8 % copyright notice and this permission notice appear in all copies.
15 % ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 % ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 % OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 % OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 % 17 %
18 %////////////////////////////////////////////////////////////////////////////// 18 %//////////////////////////////////////////////////////////////////////////////
19 19
20 \subsection{SPARC Calling Convention} 20 \subsection{SPARC Calling Conventions}
21 21
22 \paragraph{Overview} 22 \paragraph{Overview}
23 23
24 The SPARC family of processors is based on the SPARC instruction set architecture, which comes in basically tree revisions, 24 The SPARC family of processors is based on the SPARC instruction set architecture, which comes in basically three revisions,
25 V7, V8\cite{SPARCV8}\cite{SPARCSysV} and V9\cite{SPARCV9}\cite{SPARCV9SysV}. The former two are 32-bit whereas the latter refers to the 64-bit SPARC architecture (see next chapter). 25 V7, V8\cite{SPARCV8}\cite{SPARCSysV} and V9\cite{SPARCV9}\cite{SPARCV9SysV}. The former two are 32-bit whereas the latter refers to the 64-bit SPARC architecture (see next chapter).
26 SPARC uses big endian byte order.\\ 26 SPARC uses big endian byte order.\\
27 The word size is defined to be 32 bits.
27 28
28 \paragraph{\product{dyncall} support} 29 \paragraph{\product{dyncall} support}
29 30
30 \product{dyncall} fully supports the SPARC 32-bit instruction set (V7 and V8), for calls and callbacks. 31 \product{dyncall} fully supports the SPARC 32-bit instruction set (V7 and V8), for calls and callbacks.
31 32
63 \item caller cleans up the stack 64 \item caller cleans up the stack
64 \item stack always aligned to 8 bytes 65 \item stack always aligned to 8 bytes
65 \item first 6 integers and floats are passed independently in registers using \%o0-\%o5 66 \item first 6 integers and floats are passed independently in registers using \%o0-\%o5
66 \item for every other argument the stack is used 67 \item for every other argument the stack is used
67 \item all arguments \textless=\ 32 bit are passed as 32 bit values 68 \item all arguments \textless=\ 32 bit are passed as 32 bit values
68 \item 64 bit arguments are passed like two consecutive \textless=\ 32 bit values 69 \item 64 bit arguments are passed like two consecutive \textless=\ 32 bit values (which allows for an argument to be split between the stack and \%i5)
69 \item minimum stack size is 64 bytes, b/c stack pointer must always point at enough space to store all \%i* and \%l* registers, used when running out of register windows 70 \item minimum stack size is 64 bytes, b/c stack pointer must always point at enough space to store all \%i* and \%l* registers, used when running out of register windows
70 \item if needed, register spill area is adjacent to parameters 71 \item if needed, register spill area is adjacent to parameters
71 \item results are expected by caller to be returned in \%o0/\%o1 (after reg window restore, meaning callee writes to \%i0/\%i1) for integers, \%f0/\%f1 for floats, and for structs/unions a pointer to them is used as a hidden stack parameter (see below) 72 \end{itemize}
73
74 \paragraph{Return values}
75
76 \begin{itemize}
77 \item results are expected by caller to be returned in \%o0/\%o1 (after reg window restore, meaning callee writes to \%i0/\%i1) for integers
78 \item \%f0/\%f1 are used for floating point values
79 \item structs/unions are returned in a space allocated by the caller, with a pointer to it passed as a {\bf additional}, hidden stack parameter (see below)
72 \end{itemize} 80 \end{itemize}
73 81
74 \paragraph{Stack layout} 82 \paragraph{Stack layout}
75 83
84 % verified/amended: TP nov 2019 (see also doc/disas_examples/sparc.sparc.disas)
76 Stack directly after function prolog:\\ 85 Stack directly after function prolog:\\
77 86
78 \begin{figure}[h] 87 \begin{figure}[h]
79 \begin{tabular}{5|3|1 1} 88 \begin{tabular}{5|3|1 1}
80 \hhline{~-~~}
81 & \vdots & & \\ 89 & \vdots & & \\
82 \hhline{~=~~} 90 \hhline{~=~~}
83 local data (and padding) & \hspace{4cm} & & \mrrbrace{9}{caller's frame} \\ 91 local data (and padding) & \hspace{4cm} & & \mrrbrace{9}{caller's frame} \\
84 \hhline{~-~~} 92 \hhline{~-~~}
85 \mrlbrace{7}{parameter area} & argument x & \mrrbrace{3}{stack parameters} & \\ 93 \mrlbrace{7}{parameter area} & arg n-1 & \mrrbrace{3}{stack parameters} & \\
86 & \ldots & & \\ 94 & \ldots & & \\
87 & argument 6 & & \\ 95 & 7th word of arg data & & \\
88 & input argument 5 spill & \mrrbrace{3}{spill area} & \\ 96 & \%5 & \mrrbrace{3}{spill area} & \\
89 & \ldots & & \\ 97 & \ldots & & \\
90 & input argument 0 spill & & \\ 98 & \%0 & & \\
91 & struct/union return pointer & & \\ 99 & struct/union return pointer & & \\
92 \hhline{~-~~} 100 \hhline{~-~~}
93 register save area (\%i* and \%l*) & & & \\ 101 register save area (\%i* and \%l*) & & & \\
94 \hhline{~=~~} 102 \hhline{~=~~}
95 local data (and padding) & & & \mrrbrace{3}{current frame} \\ 103 local data (and padding) & & & \mrrbrace{3}{current frame} \\
96 \hhline{~-~~} 104 \hhline{~-~~}
97 parameter area & & & \\ 105 parameter area & & & \\
98 \hhline{~-~~} 106 \hhline{~-~~}
99 & \vdots & & \\ 107 & \vdots & & \\
100 \hhline{~-~~}
101 \end{tabular} 108 \end{tabular}
102 \\
103 \\
104 \\
105 \caption{Stack layout on sparc32 calling convention} 109 \caption{Stack layout on sparc32 calling convention}
106 \end{figure} 110 \end{figure}
107 111