Mercurial > pub > dyncall > dyncall

comparison doc/manual/callconvs/callconv_mips64.tex @ 328:276eb8c87aa0

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
- review and fixes, cleanup, amendments to calling convention appendix of manual
author Tassilo Philipp
date Fri, 22 Nov 2019 23:11:56 +0100
parents b104c5beec8b
children 3c6bc720bc1f
comparison
equal deleted inserted replaced
327:c0390dc85a07 328:276eb8c87aa0
1 %////////////////////////////////////////////////////////////////////////////// 1 %//////////////////////////////////////////////////////////////////////////////
2 % 2 %
3 % Copyright (c) 2007-2016 Daniel Adler <dadler@uni-goettingen.de>, 3 % Copyright (c) 2007-2019 Daniel Adler <dadler@uni-goettingen.de>,
4 % Tassilo Philipp <tphilipp@potion-studios.com> 4 % Tassilo Philipp <tphilipp@potion-studios.com>
5 % 5 %
6 % Permission to use, copy, modify, and distribute this software for any 6 % Permission to use, copy, modify, and distribute this software for any
7 % purpose with or without fee is hereby granted, provided that the above 7 % purpose with or without fee is hereby granted, provided that the above
8 % copyright notice and this permission notice appear in all copies. 8 % copyright notice and this permission notice appear in all copies.
15 % ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 % ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 % OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 % OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 % 17 %
18 %////////////////////////////////////////////////////////////////////////////// 18 %//////////////////////////////////////////////////////////////////////////////
19 19
20 \subsection{MIPS64 Calling Convention} 20 \subsection{MIPS64 Calling Conventions}
21 21
22 \paragraph{Overview} 22 \paragraph{Overview}
23 23
24 There are two main ABIs in use for MIPS64 chips, \emph{N64}\cite{MIPSn32/n64} and \emph{N32}\cite{MIPSn32/n64}. Both are 24 There are two main ABIs in use for MIPS64 chips, \emph{N64}\cite{MIPSn32/n64} and \emph{N32}\cite{MIPSn32/n64}. Both are
25 basically the same, except that N32 uses 32-bit pointers and long integers, instead of 64. All registers of a MIPS64 chip are considered 25 basically the same, except that N32 uses 32-bit pointers and long integers, instead of 64. All registers of a MIPS64 chip are considered
26 to be 64-bit wide, even for the N32 calling convention.\\ 26 to be 64-bit wide, even for the N32 calling convention.\\
27 The word size is defined to be 32 bits, a dword 64 bits. Note that this is due to historical reasons (terminology didn't change from MIPS32).\\ 27 The word size is defined to be 32 bits, a dword 64 bits. Note that this is due to historical reasons (terminology didn't change from MIPS32).\\
28 Other than that there are 64-bit versions of the other ABIs found for MIPS32, e.g. the EABI\cite{MIPSeabi} and O64\cite{MIPSo64}. 28 Other than that there are correspoding 64-bit versions other MIPS32 ABIs, e.g. the EABI\cite{MIPSeabi} and O64\cite{MIPSo64}.
29 29
30 \paragraph{\product{dyncall} support} 30 \paragraph{\product{dyncall} support}
31 31
32 For MIPS 64-bit machines, dyncall supports the N64 calling conventions for calls and callbacks (for all four combinations of big/little-endian, and soft/hard-float targets). 32 For MIPS 64-bit machines, dyncall supports the N64 calling conventions for calls and callbacks (for all four combinations of big/little-endian, and soft/hard-float targets).
33 The N32 calling convention might work - it used to, but hasn't been tested, recently. 33 The N32 calling convention might work - it used to, but hasn't been tested, recently.
39 \begin{table}[h] 39 \begin{table}[h]
40 \begin{tabular*}{0.95\textwidth}{lll} 40 \begin{tabular*}{0.95\textwidth}{lll}
41 Name & Alias & Brief description\\ 41 Name & Alias & Brief description\\
42 \hline 42 \hline
43 {\bf \$0} & {\bf \$zero} & hardware zero \\ 43 {\bf \$0} & {\bf \$zero} & hardware zero \\
44 {\bf \$1} & {\bf \$at} & assembler temporary \\ 44 {\bf \$1} & {\bf \$at} & assembler temporary, scratch \\
45 {\bf \$2-\$3} & {\bf \$v0-\$v1} & return value (only integer on hard-float targets) \\ 45 {\bf \$2-\$3} & {\bf \$v0-\$v1} & return value (only integer on hard-float targets), scratch \\
46 {\bf \$4-\$11} & {\bf \$a0-\$a7} & first arguments (only integer on hard-float targets) \\ 46 {\bf \$4-\$11} & {\bf \$a0-\$a7} & first arguments (only integer on hard-float targets), scratch \\
47 {\bf \$12-\$15,\$24} & {\bf \$t4-\$t7,\$t8} & temporaries, scratch \\ 47 {\bf \$12-\$15,\$24} & {\bf \$t4-\$t7,\$t8} & temporaries, scratch \\
48 {\bf \$25} & {\bf \$t9} & temporary, holds the address of the called function for all PIC calls (by convention) \\ 48 {\bf \$25} & {\bf \$t9} & temporary, address callee for all PIC calls (by convention), scratch \\
49 {\bf \$16-\$23} & {\bf \$s0-\$s7} & preserved \\ 49 {\bf \$16-\$23} & {\bf \$s0-\$s7} & preserve \\
50 {\bf \$26,\$27} & {\bf \$kt0,\$kt1} & reserved for kernel \\ 50 {\bf \$26,\$27} & {\bf \$kt0,\$kt1} & reserved for kernel \\
51 {\bf \$28} & {\bf \$gp} & global pointer, preserve \\ 51 {\bf \$28} & {\bf \$gp} & global pointer, preserve \\
52 {\bf \$29} & {\bf \$sp} & stack pointer, preserve \\ 52 {\bf \$29} & {\bf \$sp} & stack pointer, preserve \\
53 {\bf \$30} & {\bf \$s8} & frame pointer, preserve \\ 53 {\bf \$30} & {\bf \$s8} & frame pointer, preserve \\
54 {\bf \$31} & {\bf \$ra} & return address, preserve \\ 54 {\bf \$31} & {\bf \$ra} & return address, preserve \\
55 {\bf hi, lo} & & multiply/divide special registers \\ 55 {\bf hi, lo} & & multiply/divide special registers \\
56 {\bf \$f0,\$f2} & & only on hard-float targets: float results \\ 56 {\bf \$f0,\$f2} & & only on hard-float targets: float results, scratch \\
57 {\bf \$f1,\$f3,\$f4-\$f11,\$f20-\$f23} & & only on hard-float targets: float temporaries \\ 57 {\bf \$f1,\$f3,\$f4-\$f11,\$f20-\$f23} & & only on hard-float targets: float temporaries, scratch \\
58 {\bf \$f12-\$f19} & & only on hard-float targets: float arguments \\ 58 {\bf \$f12-\$f19} & & only on hard-float targets: float arguments, scratch \\
59 {\bf \$f24-\$f31} & & only on hard-float targets: preserved \\%@@@on N32, this changes 59 {\bf \$f24-\$f31} & & only on hard-float targets: preserved \\%@@@on N32, this changes
60 \end{tabular*} 60 \end{tabular*}
61 \caption{Register usage on MIPS N64 calling convention} 61 \caption{Register usage on MIPS N64 calling convention}
62 \end{table} 62 \end{table}
63 63
73 \item subsequent arguments are pushed onto the stack 73 \item subsequent arguments are pushed onto the stack
74 \item all stack entries are 64-bit aligned 74 \item all stack entries are 64-bit aligned
75 \item all stack regions are 16-byte aligned 75 \item all stack regions are 16-byte aligned
76 \item results are returned in \$v0, and for a second one \$v1 is used 76 \item results are returned in \$v0, and for a second one \$v1 is used
77 \item only on hard-float targets: floating point results are returned in \$f0 77 \item only on hard-float targets: floating point results are returned in \$f0
78 \item float arguments passed in the variable part of a vararg call are passed like integers 78 \item if the callee takes the address of one of the parameters and uses it to address other unnamed parameters (e.g. varargs) it has to copy - in its prolog - the the argument registers to a reserved stack area adjacent to the other parameters on the stack (only the unnamed integer parameters require saving, though) % @@@ seems to *ONLY* spill with varargs, never for any other reason
79 \item float arguments passed in the variable part of a vararg call are passed like integers, meaning float registers don't ever need to be saved that way, so only \$a0-\$a7 are need to be spilled
79 \item quad precision float arguments are passed in even-odd register pairs, skipping one register if needed 80 \item quad precision float arguments are passed in even-odd register pairs, skipping one register if needed
80 \item integer parameters \textless\ 64 bit are right-justified (meaning occupy higher-address bytes) in their 8-byte slot on the stack, requiring extra-care for big-endian targets 81 \item integer parameters \textless\ 64 bit are right-justified (meaning occupy higher-address bytes) in their 8-byte slot on the stack, requiring extra-care for big-endian targets
81 \item single precision float parameters (32 bit) are left-justified in their 8-byte slot on the stack, but are right justified in fp-registers on big endian targets, as they aren't promoted @@@doc says "undecided", but openbsd/octeon(mipseb) has it as described here 82 \item single precision float parameters (32 bit) are left-justified in their 8-byte slot on the stack, but are right justified in fp-registers on big endian targets, as they aren't promoted @@@doc says "undecided", but openbsd/octeon(mipseb) has it as described here
82 \end{itemize} 83 \end{itemize}
84 % maybe note somewhere that "prolog-based" spilling is neat for dyncall, as we don't have to care
83 85
84 \paragraph{Stack layout} 86 \paragraph{Stack layout}
85 87
88 % verified/amended: TP nov 2019 (see also doc/disas_examples/mips64.n64.disas)
86 Stack directly after function prolog:\\ 89 Stack directly after function prolog:\\
87 @@@ might be wrong
88 90
89 \begin{figure}[h] 91 \begin{figure}[h]
90 \begin{tabular}{5|3|1 1} 92 \begin{tabular}{5|3|1 1}
93 & \vdots & & \\
94 \hhline{~=~~}
95 register save area & \hspace{4cm} & & \mrrbrace{5}{caller's frame} \\
96 \hhline{~-~~}
97 local data & & & \\
98 \hhline{~-~~}
99 \mrlbrace{6}{parameter area} & arg n-1 & \mrrbrace{3}{stack parameters} & \\
100 & \ldots & & \\
101 & arg 8 & & \\
102 \hhline{~=~~}
103 & \$a7 & \mrrbrace{3}{spill area (if needed)} & \mrrbrace{6}{current frame} \\
104 & \ldots & & \\
105 & \$a? (first unnamed reg) & & \\
106 \hhline{~-~~}
107 register save area (with return address) & & & \\
91 \hhline{~-~~} 108 \hhline{~-~~}
92 & \vdots & & \\ 109 local data & & & \\
93 \hhline{~=~~}
94 register save area & \hspace{4cm} & & \mrrbrace{5}{caller's frame} \\
95 \hhline{~-~~}
96 local data & & & \\
97 \hhline{~-~~}
98 \mrlbrace{3}{parameter area} & \ldots & \mrrbrace{3}{stack parameters} & \\
99 & \ldots & & \\
100 & \ldots & & \\
101 \hhline{~=~~}
102 register save area & padding & & \mrrbrace{7}{current frame} \\
103 & \$ra & & \\
104 & \$s8 & & \\
105 & \$gp & & \\
106 \hhline{~-~~} 110 \hhline{~-~~}
107 local data & & & \\ 111 parameter area & \vdots & & \\
108 \hhline{~-~~}
109 parameter area & & & \\
110 \hhline{~-~~}
111 & \vdots & & \\
112 \hhline{~-~~}
113 \end{tabular} 112 \end{tabular}
114 \caption{Stack layout on mips64 n64 calling convention} 113 \caption{Stack layout on MIPS N64 calling convention}
115 \end{figure} 114 \end{figure}
116 115
117 116
118 \subsubsection{MIPS N32 Calling Convention} 117 \subsubsection{MIPS N32 Calling Convention}
119 118