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1 /*
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2
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3 Package: dyncall
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4 Library: dyncall
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5 File: dyncall/dyncall_call_sparc_v9.S
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6 Description: Call kernel for sparc64 v9 ABI.
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7 License:
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8
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9 Copyright (c) 2011-2015 Daniel Adler <dadler@uni-goettingen.de>
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10
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11 Permission to use, copy, modify, and distribute this software for any
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12 purpose with or without fee is hereby granted, provided that the above
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13 copyright notice and this permission notice appear in all copies.
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14
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15 THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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16 WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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17 MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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18 ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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19 WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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20 ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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21 OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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22
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23 */
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24
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25
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26 #define BIAS 2047
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27 .global dcCall_v9
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28 /* dcCall_sparc64( DCCallVM* , void * target ) */
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29 /* o0 o1 */
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30 dcCall_v9:
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31 or %o0, %g0, %o3 /* o3: callvm */
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32 or %o1, %g0, %o0 /* o0: target */
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33 ldx [%o3+24], %o1 /* o1: mVecSize */
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34 add %o3, 32, %o2 /* o2: stack */
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35 /* Compute a matching stack size (approximate): o3 = align(o1+136,16) */
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36
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37 add %o1, (16+1+6)*8+15, %o3
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38 and %o3, -16, %o3
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39 neg %o3 /* o3: -stacksize */
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40 save %sp, %o3, %sp
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41
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42 ldd [%i2+8*0 ],%f0 /* Load double-precision float registers. */
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43 ldd [%i2+8*1 ],%f2
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44 ldd [%i2+8*2 ],%f4
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45 ldd [%i2+8*3 ],%f6
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46 ldd [%i2+8*4 ],%f8
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47 ldd [%i2+8*5 ],%f10
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48 ldd [%i2+8*6 ],%f12
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49 ldd [%i2+8*7 ],%f14
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50 ldd [%i2+8*8 ],%f16
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51 ldd [%i2+8*9 ],%f18
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52 ldd [%i2+8*10],%f20
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53 ldd [%i2+8*11],%f22
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54 ldd [%i2+8*12],%f24
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55 ldd [%i2+8*13],%f26
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56 ldd [%i2+8*14],%f28
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57 ldd [%i2+8*15],%f30
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58 ldx [%i2+8*0],%o0 /* Load output registers. */
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59 ldx [%i2+8*1],%o1
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60 ldx [%i2+8*2],%o2
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61 ldx [%i2+8*3],%o3
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62 ldx [%i2+8*4],%o4
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63 ldx [%i2+8*5],%o5
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64 sub %i1, 48, %i1
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65 cmp %i1, 0
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66 ble .do_call
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67 nop
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68 /* Copy loop: */
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69 add %i2, 48, %i2 /* skip homing area */
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70 or %g0, %g0, %l0 /* l0 = offset initialized to 0. */
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71 add %sp, BIAS+((16+6)*8), %l2 /* l2 = argument area on stack space (7th word). (64+4+6*4 = byte offset 92). */
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72 .next:
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73 ldx [%i2+%l0],%l1 /* Read from arg buffer(%i2) to %l1. */
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74 stx %l1, [%l2+%l0] /* Write %l1 to stack space(%l2). */
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75 add %l0, 8, %l0 /* Increment offset. */
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76 sub %i1, 8, %i1 /* Decrement copy size. */
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77 cmp %i1, 0
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78 bgt .next
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79 nop
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80 .do_call:
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81 call %i0 /* Call target. */
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82 nop
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83 or %o0, %g0, %i0
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84 jmpl %i7 + 8, %g0
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85 restore
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86
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87 /*
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88 or %o0, %g0, %i0
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89 or %o1, %g0, %i1
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90 or %o2, %g0, %i2
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91 or %o3, %g0, %i3
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92 return %i7 + 8
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93 nop
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94
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95 Changes from v8:
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96 - fundamental data types
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97 - (un)signed int: 8,16,32,64
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98 - float: 32,64,128
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99 - float: IEEE 754 compilant
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100 32 32-bit float registers f0,f1,..,f31
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101 32 64-bit float registers f0,f2,..,f62
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102 16 128-bit float registers f0,f4,..,f60
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103
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104 Description:
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105 We need to raise up a dynamic stack frame.
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106 Therefore we need to compute the stack size. We do this first,
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107 in the context of the caller as a leaf function (using o3 as scratch for addition).
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108 Then we raise the frame, ending up in o0-o3 is then i0-i3.
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109
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110
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111 Stack Layout:
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112 BIAS = 2047
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113
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114 BIAS+XX: should be 16 byte aligned.
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115 ...
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116 136: argument overflow area
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117 128: 1 extended word for struct/union poiner return value
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118 BIAS+ 0: 16 extended words for registers (in/local) save area [register window]
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119
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120
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121 Function Argument Passing:
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122 - integer %o0..%o5 (caller view).
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123 - floating-point %f0 .. %f15
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124 - continuous memory starting at %sp+BIAS+136 (caller view).
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125
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126 Register Usage:
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127 %fp0..%fp31 : floating-point arguments.
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128 %sp or %o6 : stack pointer, always 8 (or 16?)-byte aligned.
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129 %fp or %i6 : frame pointer.
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130 %i0 and %o0 : integer and pointer return values.
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131 %i7 and %o7 : return address. (caller puts return address to %o7, callee uses %i7)
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132 %fp0 and %fp1: return value (float).
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133 %i0..%i5 : input argument registers
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134 %o0..%o5 : output argument registers
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135 %g0 : always zero, writes to it have no effect.
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136
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137 Register Mappings:
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138 r0-7 -> globals
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139 r8-15 -> outs
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140 r16-r23 -> locals
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141 r24-r31 -> ins
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142
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143 Integer Register Overview Table:
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144 ID Class Name Description
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145 ------------------------------------------------------------------------------
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146 0 globals g0 always zero, writes to it have no effect
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147 1 g1
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148 2 g2
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149 3 g3
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150 4 g4
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151 5 g5
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152 6 g6
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153 7 g7
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154 8 out o0 [int/ptr] arg 0 and return
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155 9 o1 arg 1
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156 10 o2 arg 2
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157 11 o3 arg 3
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158 12 o4 arg 4
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159 13 o5 arg 5
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160 14 o6 stack pointer
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161 15 o7
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162 16 local l0 scratch
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163 17 l1
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164 18 l2
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165 19 l3
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166 20 l4
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167 21 l5
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168 22 l6
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169 23 l7
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170 24 in i0 [int/pt] arg 0 and return
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171 25 i1
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172 26 i2
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173 27 i3
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174 28 i4
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175 29 i5
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176 30 i6 frame pointer
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177 31 i7
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178 */
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179
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180 /* ---------------------------------------------------------------------------
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181
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182 call kernel for sparc64 v9 abi
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183 tested on sparc64/linux/debian [gcc54.fsffrance.org - thanx to the farm!]
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184
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185 new C Interface:
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186 void dcCall_sparc (DCCallVM* callvm, DCpointer target);
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187 %i0 %1
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188
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189 see dyncall_call_sparc.S for details.
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190
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191 old C Interface:
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192 void dcCall_sparc (DCpointer target, DCsize size, DCpointer data);
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193 %i0 , %i1 , %i2
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194 Input:
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195 i0 target
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196 i1 size
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197 i2 data
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198
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199 */
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200
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201 #if 0
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202
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203
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204 #define REGSIZE 8
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205
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206
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207
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208 #define SHEAD ((16+6)*8)
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209 #define ALIGN 16
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210 #define IREGS 6
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211 #define FREGS 16
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212 #define SREGS 16
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213 #define IBASE 0
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214 #define FBASE (IREGS*8)
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215
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216 // #define DHEAD ((IREGS+FREGS)*8)+SREGS*4
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217
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218 CALLVM_regdata = 72
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219 CALLVM_size = 208
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220 CALLVM_buffer = 216
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221
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222 #endif
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