# HG changeset patch
# User cslag
# Date 1467720956 -7200
# Node ID f1fc1c836bafc1b0a75c36e08f12e9c55ba08ba8
# Parent  6bd0974d257b0559b6af3273f7f2024f25023a1e
- mips doc stuff

diff -r 6bd0974d257b -r f1fc1c836baf doc/manual/callconvs/callconv_mips64.tex
--- a/doc/manual/callconvs/callconv_mips64.tex	Mon Jul 04 16:14:59 2016 +0200
+++ b/doc/manual/callconvs/callconv_mips64.tex	Tue Jul 05 14:15:56 2016 +0200
@@ -74,7 +74,9 @@
 \item all stack regions are 16-byte aligned
 \item results are returned in \$v0, and for a second one \$v1 is used
 \item float arguments passed in the variable part of a vararg call are passed like integers
-\item integer parameters \textless\ 64 bit are right-justified (meaning occupy higher-address bytes) in their 8-byte area, requiring extra-care for big-endian targets
+\item quad precision float arguments are passed in even-odd register pairs, skipping one register if needed
+\item integer parameters \textless\ 64 bit are right-justified (meaning occupy higher-address bytes) in their 8-byte slot on the stack, requiring extra-care for big-endian targets
+\item single precision float parameters (32 bit) are left-justified in their 8-byte slot on the stack, but are right justified in fp-registers on big endian targets, as they aren't promoted @@@doc says "undecided", but openbsd/octeon(mipseb) has it as described here
 \end{itemize}
 
 \paragraph{Stack layout}
diff -r 6bd0974d257b -r f1fc1c836baf doc/manual/callconvs/callconv_ppc32.tex
--- a/doc/manual/callconvs/callconv_ppc32.tex	Mon Jul 04 16:14:59 2016 +0200
+++ b/doc/manual/callconvs/callconv_ppc32.tex	Tue Jul 05 14:15:56 2016 +0200
@@ -89,7 +89,7 @@
 \item composite parameters with size of 1 or 2 bytes occupy low-order bytes of their 4-byte area. INCONSISTENT with other 32-bit PPC
 binary interfaces. In AIX and OS 9, padding bytes always follow the data structure
 \item composite parameters 3 bytes or larger in size occupy high-order bytes
-\item integer parameters \textless\ 32 bit are right-justified (meaning occupy higher-address bytes) in their 4-byte area, requiring extra-care for big-endian targets
+\item integer parameters \textless\ 32 bit are right-justified (meaning occupy higher-address bytes) in their 4-byte slot on the stack, requiring extra-care for big-endian targets
 \end{itemize}
 
 
diff -r 6bd0974d257b -r f1fc1c836baf doc/manual/callconvs/callconv_ppc64.tex
--- a/doc/manual/callconvs/callconv_ppc64.tex	Mon Jul 04 16:14:59 2016 +0200
+++ b/doc/manual/callconvs/callconv_ppc64.tex	Tue Jul 05 14:15:56 2016 +0200
@@ -47,7 +47,7 @@
 
 \begin{itemize}
 @@@
-\item integer parameters \textless\ 64 bit are right-justified (meaning occupy higher-address bytes) in their 8-byte area, requiring extra-care for big-endian targets
+\item integer parameters \textless\ 64 bit are right-justified (meaning occupy higher-address bytes) in their 8-byte slot on the stack, requiring extra-care for big-endian targets
 \end{itemize}