# HG changeset patch
# User Tassilo Philipp
# Date 1647536204 -3600
# Node ID d160046da104206a13eb7cf8fdc4ee7e60a195da
# Parent  0c68b3f9136769239469382c9fd1107a26e065de
doc cleanup: removed outdated/wrong info and fixed wrong value size specs

diff -r 0c68b3f91367 -r d160046da104 doc/manual/callconvs/callconv_arm32.tex
--- a/doc/manual/callconvs/callconv_arm32.tex	Thu Mar 17 15:41:26 2022 +0100
+++ b/doc/manual/callconvs/callconv_arm32.tex	Thu Mar 17 17:56:44 2022 +0100
@@ -142,12 +142,6 @@
 
 \paragraph{Status}
 
-\begin{itemize}
-\item The ATPCS THUMB mode is untested.
-\item Ellipsis calls may not work.
-\item C++ this calls do not work.
-\end{itemize}
-
 \paragraph{Registers and register usage}
 
 In THUMB mode, the ARM32 processor family supports eight 32 bit general purpose registers r0-r7 and access to high order registers r8-r15:\\
diff -r 0c68b3f91367 -r d160046da104 doc/manual/callconvs/callconv_x64.tex
--- a/doc/manual/callconvs/callconv_x64.tex	Thu Mar 17 15:41:26 2022 +0100
+++ b/doc/manual/callconvs/callconv_x64.tex	Thu Mar 17 17:56:44 2022 +0100
@@ -106,10 +106,9 @@
 \paragraph{Return values}
 
 \begin{itemize}
-\item return values of pointer or integral type (\textless=\ 64 bits) are returned via the rax register
+\item return values of pointer, integral or aggregate (structs and unions) type (\textless=\ 64 bits) are returned via the rax register
 \item floating point types are returned via the xmm0 register
-\item aggregates (structs and unions) \textless\ 64 bits are returned via the rax register
-\item for types \textgreater\ 64 bits, a hidden first parameter, with an address to the return value is passed (for C++ thiscalls it is passed as {\bf second} parameter, after the this pointer)
+\item for any other type \textgreater\ 64 bits, a hidden first parameter, with an address to the return value is passed (for C++ thiscalls it is passed as {\bf second} parameter, after the this pointer)
 \end{itemize}