# HG changeset patch
# User Tassilo Philipp
# Date 1663881351 -7200
# Node ID 9d0eefb0e0f05b685ed5ecfe67eb9ddeb9810fa5
# Parent  85b7a117b8078a5dfe34556e93c8ff9acecc6722
- sparc64 callback crash fix (local register wasn't preserved)
- manual typo fixed

diff -r 85b7a117b807 -r 9d0eefb0e0f0 ChangeLog
--- a/ChangeLog	Wed Sep 21 15:20:58 2022 +0200
+++ b/ChangeLog	Thu Sep 22 23:15:51 2022 +0200
@@ -20,6 +20,7 @@
   o new, portable aggregate-by-value callback argument interface
   o aggregate-by-value (struct, union) support for x64 (win and sysv; thanks Raphael Luba!)
   o x64/windows masm directives for frame unwinding information (as dbg help; thanks Raphael Luba!)
+  o sparc64 callback crash fix
 dynload:
   o build fix for ReactOS with RosBE/cmake/mingw-make environment
 general:
diff -r 85b7a117b807 -r 9d0eefb0e0f0 doc/manual/callconvs/callconv_sparc64.tex
--- a/doc/manual/callconvs/callconv_sparc64.tex	Wed Sep 21 15:20:58 2022 +0200
+++ b/doc/manual/callconvs/callconv_sparc64.tex	Thu Sep 22 23:15:51 2022 +0200
@@ -34,7 +34,7 @@
 \subsubsection{SPARC (64-bit) Calling Convention}
 
 \begin{itemize}
-\item 32 double precision floating point registers (d0,d2,d4,...,d62, usable as 16 quad precision ones q0,q4,q8,...g60, and also first half of them are usable as 32 single precision registers f0-f31)
+\item 32 double precision floating point registers (d0,d2,d4,...,d62, usable as 16 quad precision ones q0,q4,q8,...q60, and also first half of them are usable as 32 single precision registers f0-f31)
 \item 32 64-bit integer/pointer registers out of a bigger (vendor/model dependent) number that are accessible at a time (8 are global ones (g*), whereas the remaining 24 form a register window with 8 input (i*), 8 output (o*) and 8 local (l*) ones)
 \item calling a function shifts the register window, the old output registers become the new input registers (old local and input ones are not accessible anymore)
 \item stack and frame pointer are offset by a BIAS of 2047 (see official doc for reasons)
diff -r 85b7a117b807 -r 9d0eefb0e0f0 dyncallback/dyncall_thunk_sparc64.c
--- a/dyncallback/dyncall_thunk_sparc64.c	Wed Sep 21 15:20:58 2022 +0200
+++ b/dyncallback/dyncall_thunk_sparc64.c	Thu Sep 22 23:15:51 2022 +0200
@@ -6,7 +6,7 @@
  Description: Thunk - Implementation for sparc64
  License:
 
-   Copyright (c) 2007-2018 Daniel Adler <dadler@uni-goettingen.de>,
+   Copyright (c) 2007-2022 Daniel Adler <dadler@uni-goettingen.de>,
                            Tassilo Philipp <tphilipp@potion-studios.com>
 
    Permission to use, copy, modify, and distribute this software for any
@@ -33,21 +33,24 @@
    0:   03 00 00 00   sethi  %hi(0), %g1
    4:   82 10 60 00   or     %g1, 0, %g1
    8:   83 28 70 20   sllx   %g1, 0x20, %g1
-  12:   21 00 00 00   sethi  %hi(0), %l0
-  16:   a0 14 20 00   or     %l0, 0, %l0
-  20:   82 04 00 01   add    %l0, %g1, %g1
+
+  12:   21 00 00 00   sethi  %hi(0), %g3
+  16:   a0 14 20 00   or     %g3, 0, %g3
+  20:   82 04 00 01   add    %g3, %g1, %g1
                       ; use g2 for entry pointer and "call" it, b/c branch instructions can't handle 64bit addresses
   24:   05 00 00 00   sethi  %hi(0), %g2
   28:   84 10 a0 00   or     %g2, 0, %g2
   32:   85 28 b0 20   sllx   %g2, 0x20, %g2
-  36:   21 00 00 00   sethi  %hi(0), %l0
-  40:   a0 14 20 00   or     %l0, 0, %l0
-  44:   84 04 00 02   add    %l0, %g2, %g2
+
+  36:   21 00 00 00   sethi  %hi(0), %g3
+  40:   a0 14 20 00   or     %g3, 0, %g3
+  44:   84 04 00 02   add    %g3, %g2, %g2
                       ; jump - write link to %g0, effectively discarding it; also nop for delay slot
   48:   81 c0 80 00   jmpl   %g2, %g0
   52:   01 00 00 00   nop
   */
 
+
   union {
     unsigned int x[2];
     void* p;
@@ -58,15 +61,15 @@
   p->code[ 0] = 0x03000000 | (t.x[0] >> 10);      /* sethi %hi(p), %g1      -- hi 22 bits */
   p->code[ 1] = 0x82106000 | (t.x[0] & 0x3ff);    /* or %g1, <p&0x3ff>, %g1 -- lo 10 bits */
   p->code[ 2] = 0x83287020;                       /* sllx %g1, 0x20, %g1                  */
-  p->code[ 3] = 0x21000000 | (t.x[1] >> 10);      /* sethi %hi(p), %l0                    */
-  p->code[ 4] = 0xa0142000 | (t.x[1] & 0x3ff);    /* or %l0, <p&0x3ff>, %l0               */
-  p->code[ 5] = 0x82040001;                       /* add %l0, %g1, %g1                    */
+  p->code[ 3] = 0x07000000 | (t.x[1] >> 10);      /* sethi %hi(p), %g3                    */
+  p->code[ 4] = 0x8610e000 | (t.x[1] & 0x3ff);    /* or %g3, <p&0x3ff>, %g3               */
+  p->code[ 5] = 0x8200c001;                       /* add %g3, %g1, %g1                    */
   p->code[ 6] = 0x05000000 | (e.x[0] >> 10);      /* sethi %hi(entry), %g2                */
   p->code[ 7] = 0x8410a000 | (e.x[0] & 0x3ff);    /* or %g2, <entry&0x3ff>, %g2           */
   p->code[ 8] = 0x8528b020;                       /* sllx %g2, 0x20, %g2                  */
-  p->code[ 9] = 0x21000000 | (e.x[1] >> 10);      /* sethi %hi(entry), %l0                */
-  p->code[10] = 0xa0142000 | (e.x[1] & 0x3ff);    /* or %l0, <entry&0x3ff>, %l0           */
-  p->code[11] = 0x84040002;                       /* add %l0, %g2, %g2                    */
+  p->code[ 9] = 0x07000000 | (e.x[1] >> 10);      /* sethi %hi(entry), %g3                */
+  p->code[10] = 0x8610e000 | (e.x[1] & 0x3ff);    /* or %g3, <entry&0x3ff>, %g3           */
+  p->code[11] = 0x8400c002;                       /* add %g3, %g2, %g2                    */
   p->code[12] = 0x81c08000;                       /* jmpl %g2, %g0  -- discards link addr */
   p->code[13] = 0x01000000;                       /* nop                                  */
 }