# HG changeset patch
# User Tassilo Philipp
# Date 1617813586 -7200
# Node ID 524fdca405bf3f37afbbf7c71c5d6124ec550b9f
# Parent  a3e47b7c808cc4e2717c820bba083169e375da5b
- some doc/manual callconv clarifications for arm

diff -r a3e47b7c808c -r 524fdca405bf doc/manual/callconvs/callconv_arm32.tex
--- a/doc/manual/callconvs/callconv_arm32.tex	Wed Apr 07 17:55:59 2021 +0200
+++ b/doc/manual/callconvs/callconv_arm32.tex	Wed Apr 07 18:39:46 2021 +0200
@@ -91,7 +91,7 @@
 \item if the callee takes the address of one of the parameters and uses it to address other parameters (e.g. varargs) it has to copy - in its prolog - the first four words to a reserved stack area adjacent to the other parameters on the stack
 \item parameters \textless=\ 32 bits are passed as 32 bit words
 \item 64 bit parameters are passed as two 32 bit parts (even partly via the register and partly via the stack, although this doesn't seem to be specified in the ATPCS)
-\item structures and unions are passed by value, with the first four words of the parameters in r0-r3
+\item structures and unions are passed by value (after rounding up the size to the nearest multiple of 4), as a sequence of words
 \item if return value is a structure, a pointer pointing to the return value's space is passed in r0, the first parameter in r1, etc... (see {\bf return values})
 \item keeping the stack eight-byte aligned can improve memory access performance and is required by LDRD and STRD on ARMv5TE processors which are part of the ARM32 family, so, in order to avoid problems one should always align the stack (tests have shown, that GCC does care about the alignment when using the ellipsis)
 \end{itemize}
@@ -181,7 +181,7 @@
 \item if the callee takes the address of one of the parameters and uses it to address other parameters (e.g. varargs) it has to copy - in its prolog - the first four words to a reserved stack area adjacent to the other parameters on the stack
 \item parameters \textless=\ 32 bits are passed as 32 bit words
 \item 64 bit parameters are passed as two 32 bit parts (even partly via the register and partly via the stack), although this doesn't seem to be specified in the ATPCS)
-\item structures and unions are passed by value, with the first four words of the parameters in r0-r3
+\item structures and unions are passed by value (after rounding up the size to the nearest multiple of 4), as a sequence of words
 \item if return value is a structure, a pointer pointing to the return value's space is passed in r0, the first parameter in r1, etc. (see {\bf return values})
 \item keeping the stack eight-byte aligned can improve memory access performance and is required by LDRD and STRD on ARMv5TE processors which are part of the ARM32 family, so, in order to avoid problems one should always align the stack (tests have shown, that GCC does care about the alignment when using the ellipsis)
 \end{itemize}
@@ -377,7 +377,7 @@
 \item float and double vararg function parameters (no matter if in ellipsis part of function, or not) are passed like int or long long parameters, vfp registers aren't used
 \item if the callee takes the address of one of the parameters and uses it to address other parameters (e.g. varargs) it has to copy - in its prolog - the first four words (for first 4 integer arguments) to a reserved stack area adjacent to the other parameters on the stack
 \item parameters \textless=\ 32 bits are passed as 32 bit words
-\item structures and unions are passed by value, with the first four words of the parameters in r0-r3
+\item structures and unions are passed by value (after rounding up the size to the nearest multiple of 4), as a sequence of words
 \item if return value is a structure, a pointer pointing to the return value's space is passed in r0, the first parameter in r1, etc. (see {\bf return values})
 \item callee spills, caller reserves spill area space, though
 \end{itemize}
diff -r a3e47b7c808c -r 524fdca405bf doc/manual/callconvs/callconv_arm64.tex
--- a/doc/manual/callconvs/callconv_arm64.tex	Wed Apr 07 17:55:59 2021 +0200
+++ b/doc/manual/callconvs/callconv_arm64.tex	Wed Apr 07 18:39:46 2021 +0200
@@ -44,7 +44,8 @@
 zero register for all other instructions {\bf xzr/wzr}, and {\bf pc}, the
 program counter. Additionally, there are thirty-two 128 bit registers {\bf v0-v31},
 to be used as SIMD and floating point registers, referred to as {\bf q0-q31}, {\bf d0-d31}
-and {\bf s0-s31}, respectively, depending on their use:\\
+and {\bf s0-s31}, respectively (in contrast to AArch32, those do not overlap multiple
+narrower registers), depending on their use:\\
 
 \begin{table}[h]
 \begin{tabular*}{0.95\textwidth}{3 B}
@@ -61,6 +62,10 @@
 {\bf x30}     & permanent, link register\\
 {\bf sp}      & permanent, stack pointer\\
 {\bf pc}      & program counter\\
+{\bf v0}      & scratch, first float parameter, float return value\\
+{\bf v1-v7}   & scratch, float parameters\\
+{\bf v8-v15}  & lower 64 bits are permanent, scratch\\
+{\bf v16-v31} & scratch\\
 \end{tabular*}
 \caption{Register usage on arm64}
 \end{table}
@@ -74,7 +79,8 @@
 \item first 8 floating point arguments are passed using d0-d7
 \item subsequent parameters are pushed onto the stack
 \item if the callee takes the address of one of the parameters and uses it to address other parameters (e.g. varargs) it has to copy - in its prolog - the first 8 integer and 8 floating-point registers to a reserved stack area adjacent to the other parameters on the stack (only the unnamed integer parameters require saving, though)
-\item structures and unions are passed by value, with the first four words of the parameters in r0-r3
+\item structures and unions up to 16 bytes in size are passed by value (after rounding up the size to the nearest multiple of 8), as a sequence of dwords
+\item for a structure or union larger than 16 bytes in size, a pointer to it is passed
 \item if return value is a structure, a pointer pointing to the return value's space is passed in r0, the first parameter in r1, etc... (see {\bf return values})
 \item stack is required to be throughout eight-byte aligned
 \end{itemize}