--- a/doc/manual/callconvs/callconv_mips64.tex	Mon Jul 04 16:14:59 2016 +0200
+++ b/doc/manual/callconvs/callconv_mips64.tex	Tue Jul 05 14:15:56 2016 +0200
@@ -74,7 +74,9 @@
 \item all stack regions are 16-byte aligned
 \item results are returned in \$v0, and for a second one \$v1 is used
 \item float arguments passed in the variable part of a vararg call are passed like integers
-\item integer parameters \textless\ 64 bit are right-justified (meaning occupy higher-address bytes) in their 8-byte area, requiring extra-care for big-endian targets
+\item quad precision float arguments are passed in even-odd register pairs, skipping one register if needed
+\item integer parameters \textless\ 64 bit are right-justified (meaning occupy higher-address bytes) in their 8-byte slot on the stack, requiring extra-care for big-endian targets
+\item single precision float parameters (32 bit) are left-justified in their 8-byte slot on the stack, but are right justified in fp-registers on big endian targets, as they aren't promoted @@@doc says "undecided", but openbsd/octeon(mipseb) has it as described here
 \end{itemize}
 
 \paragraph{Stack layout}