--- a/doc/manual/callconvs/callconv_x64.tex	Wed Feb 02 18:30:44 2022 +0100
+++ b/doc/manual/callconvs/callconv_x64.tex	Fri Feb 04 23:54:42 2022 +0100
@@ -84,13 +84,14 @@
 \item caller cleans up the stack
 \item first 4 integer/pointer parameters are passed via rcx, rdx, r8, r9 (from left to right), others are pushed on stack (there is a
 spill area for the first 4)
+\item aggregates (structs and unions) \textless\ 64 bits are passed like equal-sized integers
 \item float and double parameters are passed via xmm0l-xmm3l
 \item first 4 parameters are passed via the correct register depending on the parameter type - with mixed float and int parameters,
 some registers are left out (e.g. first parameter ends up in rcx or xmm0, second in rdx or xmm1, etc.)
 \item parameters in registers are right justified
 \item parameters \textless\ 64bits are not zero extended - zero the upper bits contiaining garbage if needed (but they are always
 passed as a qword)
-\item parameters \textgreater\ 64 bit are passed by reference
+\item parameters \textgreater\ 64 bits are passed by reference (for aggregate types, that caller-allocated memory must be 16-byte aligned)
 \item if callee takes address of a parameter, first 4 parameters must be dumped (to the reserved space on the stack) - for
 floating point parameters, value must be stored in integer AND floating point register
 \item caller cleans up the stack, not the callee (like cdecl)
@@ -107,7 +108,8 @@
 \begin{itemize}
 \item return values of pointer or integral type (\textless=\ 64 bits) are returned via the rax register
 \item floating point types are returned via the xmm0 register
-\item for types \textgreater\ 64 bits, a secret first parameter with an address to the return value is passed
+\item aggregates (structs and unions) \textless\ 64 bits are returned via the rax register
+\item for types \textgreater\ 64 bits, a hidden first parameter, with an address to the return value is passed (for C++ thiscalls it is passed as {\bf second} parameter, after the this pointer)
 \end{itemize}
 
 
@@ -148,7 +150,7 @@
 
 
 
-\newpage
+\clearpage
 
 \subsubsection{System V (Linux / *BSD / MacOS X)}
 
@@ -158,7 +160,7 @@
 \begin{tabular*}{0.95\textwidth}{3 B}
 Name                & Brief description\\
 \hline
-{\bf rax}           & scratch, return value\\
+{\bf rax}           & scratch, return value, special use for varargs (in al, see below)\\
 {\bf rbx}           & permanent\\
 {\bf rcx}           & scratch, parameter 3 if integer or pointer\\
 {\bf rdx}           & scratch, parameter 2 if integer or pointer, return value\\
@@ -169,8 +171,8 @@
 {\bf r8-r9}         & scratch, parameter 4 and 5 if integer or pointer\\
 {\bf r10-r11}       & scratch\\
 {\bf r12-r15}       & permanent\\
-{\bf xmm0}          & scratch, floating point parameters 0, floating point return value\\
-{\bf xmm1-xmm7}     & scratch, floating point parameters 1-7\\
+{\bf xmm0-xmm1}     & scratch, floating point parameters 0-1, floating point return value\\
+{\bf xmm2-xmm7}     & scratch, floating point parameters 2-7\\
 {\bf xmm8-xmm15}    & scratch\\
 {\bf st0-st1}       & scratch, 16 byte floating point return value\\
 {\bf st2-st7}       & scratch\\
@@ -186,12 +188,30 @@
 \item first 6 integer/pointer parameters are passed via rdi, rsi, rdx, rcx, r8, r9
 \item first 8 floating point parameters \textless=\ 64 bits are passed via xmm0l-xmm7l
 \item parameters in registers are right justified
-\item parameters that are not passed via registers are pushed onto the stack
+\item parameters that are not passed via registers are pushed onto the stack (with their sizes rounded up to qwords)
 \item parameters \textless\ 64bits are not zero extended - zero the upper bits contiaining garbage if needed (but they are always
 passed as a qword)
 \item integer/pointer parameters \textgreater\ 64 bit are passed via 2 registers
-\item if callee takes address of a parameter, number of used xmm registers is passed silently in al (passed number mustn't be
+\item if callee takes address of a parameter, number of used xmm registers is passed silently in al (passed number doesn't need to be
 exact but an upper bound on the number of used xmm registers)
+\item aggregates (structs, unions (and arrays within those)) follow a more complicated logic (the following {\bf only considers field types supported by dyncall}):
+\begin{itemize}
+  \item aggregates \textgreater\ 16 bytes are always passed entirely via the stack
+  \item for {\it non-trivial} (as defined by the language) C++ aggregates, a pointer to the aggregate is passed, instead
+  \item all other aggregates are classified per qword, by looking at all fields occupying all or part of that qword, recursively
+  \begin{itemize}
+    \item if any field would be passed via the stack, the entire qword will
+    \item otherwise, if any field would be passed like an integer/pointer value, the entire qword will
+    \item otherwise the qword is passed like a floating point value
+  \end{itemize}
+  \item after qword classification, the logic is:
+  \begin{itemize}
+    \item if any qword is classified to be passed via the stack, the entire aggregate will
+    \item if the size of the aggregate is \textgreater\ 2 qwords, it is passed via the stack (except for single floating point values \textgreater\ 128bits)
+    \item all others are passed qword by qword according to their classification, like individual arguments
+	\item however, an aggregate is never split between registers and the stack, if it doesn't fit into available registers it is entirely passed via the stack (freeing such registers for subsequent arguments)
+  \end{itemize}
+\end{itemize}
 \item stack is always 16byte aligned - since return address is 64 bits in size, stacks with an odd number of parameters are
 already aligned
 \item no spill area is used on stack, iterating over varargs requires a specific va\_list implementation
@@ -201,17 +221,26 @@
 \paragraph{Return values}
 
 \begin{itemize}
-\item return values of pointer or integral type (\textless=\ 64 bits) are returned via the rax register
-\item floating point types are returned via the xmm0 register
-\item for types \textgreater\ 64 bits, a secret first parameter with an address to the return value is passed - the passed in address
-will be returned in rax
+\item return values of pointer or integral type are returned via the rax register (and rdx if needed)
+\item floating point types are returned via the xmm0 register (and xmm1 if needed)
+\item aggregates are first classified in the same way as when passing them by value, then:
+\begin{itemize}
+  \item for aggregates that would be passed via the stack, a hidden pointer to a non-shared, caller provided space is {\bf passed} as hidden, first argument; this pointer will be returned via rax
+  \item otherwise, qword by qword is passed, using rax and rdx for integer/pointer qwords, and xmm0 and xmm1 for floating point ones
+\end{itemize}
+\item for aggregates \textgreater\ 128 bits, a secret first parameter with an address to the return value is
+passed (via rdi) - this passed in address will be returned in rax
 \item floating point values \textgreater\ 64 bits are returned via st0 and st1
 \end{itemize}
 
 
 \paragraph{Stack layout}
 
-Stack frame is always 16-byte aligned.
+Stack frame is always 16-byte aligned. A 128 byte large zone beyond the
+location pointed to by the stack pointer is referred to as "red zone",
+considered to be reserved and not be modified by signal or interrupt handlers
+(useful for temporary data not needed to be preserved across calls, and for
+optimizations for leaf functions).
 % verified/amended: TP nov 2019 (see also doc/disas_examples/x64.sysv.disas)
 Stack directly after function prolog:\\
 
@@ -241,7 +270,7 @@
 \end{figure}
 
 
-\newpage
+\clearpage
 
 \subsubsection{System V syscalls}