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comparison doc/manual/callconvs/callconv_sparc32.tex @ 200:e07fb0bbddae

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- manual cleanup
author Tassilo Philipp
date Sun, 19 Mar 2017 20:09:59 +0100
parents doc/manual/callconvs/callconv_sparc.tex@53c42b1d9f8b
children 276eb8c87aa0
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1 %//////////////////////////////////////////////////////////////////////////////
2 %
3 % Copyright (c) 2012-2017 Daniel Adler <dadler@uni-goettingen.de>,
4 % Tassilo Philipp <tphilipp@potion-studios.com>
5 %
6 % Permission to use, copy, modify, and distribute this software for any
7 % purpose with or without fee is hereby granted, provided that the above
8 % copyright notice and this permission notice appear in all copies.
9 %
10 % THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 % WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 % MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 % ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 % WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 % ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 % OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 %
18 %//////////////////////////////////////////////////////////////////////////////
19
20 \subsection{SPARC Calling Convention}
21
22 \paragraph{Overview}
23
24 The SPARC family of processors is based on the SPARC instruction set architecture, which comes in basically tree revisions,
25 V7, V8\cite{SPARCV8}\cite{SPARCSysV} and V9\cite{SPARCV9}\cite{SPARCV9SysV}. The former two are 32-bit whereas the latter refers to the 64-bit SPARC architecture (see next chapter).
26 SPARC uses big endian byte order.\\
27
28 \paragraph{\product{dyncall} support}
29
30 \product{dyncall} fully supports the SPARC 32-bit instruction set (V7 and V8), for calls and callbacks.
31
32 \subsubsection{SPARC (32-bit) Calling Convention}
33
34 \paragraph{Register usage}
35
36 \begin{itemize}
37 \item 32 single floating point registers (f0-f31, usable as 8 quad precision q0,q4,q8,...,q28, 16 double precision d0,d2,d4,...,d30)
38 \item 32 32-bit integer/pointer registers out of a bigger (vendor/model dependent) number that are accessible at a time (8 are global ones (g*), whereas the remaining 24 form a register window with 8 input (i*), 8 output (o*) and 8 local (l*) ones)
39 \item calling a function shifts the register window, the old output registers become the new input registers (old local and input ones are not accessible anymore)
40 \end{itemize}
41
42 \begin{table}[h]
43 \begin{tabular*}{0.95\textwidth}{lll}
44 Name & Alias & Brief description\\
45 \hline
46 {\bf \%g0} & \%r0 & Read-only, hardwired to 0 \\
47 {\bf \%g1-\%g7} & \%r1-\%r7 & Global \\
48 {\bf \%o0,\%o1 and \%i0,\%i1} & \%r8,\%r9 and \%r24,\%r25 & Output and input argument registers, return value \\
49 {\bf \%o2-\%o5 and \%i2-\%i5} & \%r10-\%r13 and \%r26-\%r29 & Output and input argument registers \\
50 {\bf \%o6 and \%i6} & \%r14 and \%r30, \%sp and \%fp & Stack and frame pointer \\
51 {\bf \%o7 and \%i7} & \%r15 and \%r31 & Return address (caller writes to o7, callee uses i7) \\
52 {\bf \%l0-\%l7} & \%r16-\%r23 & preserve \\
53 {\bf \%f0,\%f1} & & Floating point return value \\
54 {\bf \%f2-\%f31} & & scratch \\
55 \end{tabular*}
56 \caption{Register usage on sparc calling convention}
57 \end{table}
58
59 \paragraph{Parameter passing}
60 \begin{itemize}
61 \item stack grows down
62 \item stack parameter order: right-to-left
63 \item caller cleans up the stack
64 \item stack always aligned to 8 bytes
65 \item first 6 integers and floats are passed independently in registers using \%o0-\%o5
66 \item for every other argument the stack is used
67 \item all arguments \textless=\ 32 bit are passed as 32 bit values
68 \item 64 bit arguments are passed like two consecutive \textless=\ 32 bit values
69 \item minimum stack size is 64 bytes, b/c stack pointer must always point at enough space to store all \%i* and \%l* registers, used when running out of register windows
70 \item if needed, register spill area is adjacent to parameters
71 \item results are expected by caller to be returned in \%o0/\%o1 (after reg window restore, meaning callee writes to \%i0/\%i1) for integers, \%f0/\%f1 for floats, and for structs/unions a pointer to them is used as a hidden stack parameter (see below)
72 \end{itemize}
73
74 \paragraph{Stack layout}
75
76 Stack directly after function prolog:\\
77
78 \begin{figure}[h]
79 \begin{tabular}{5|3|1 1}
80 \hhline{~-~~}
81 & \vdots & & \\
82 \hhline{~=~~}
83 local data (and padding) & \hspace{4cm} & & \mrrbrace{9}{caller's frame} \\
84 \hhline{~-~~}
85 \mrlbrace{7}{parameter area} & argument x & \mrrbrace{3}{stack parameters} & \\
86 & \ldots & & \\
87 & argument 6 & & \\
88 & input argument 5 spill & \mrrbrace{3}{spill area} & \\
89 & \ldots & & \\
90 & input argument 0 spill & & \\
91 & struct/union return pointer & & \\
92 \hhline{~-~~}
93 register save area (\%i* and \%l*) & & & \\
94 \hhline{~=~~}
95 local data (and padding) & & & \mrrbrace{3}{current frame} \\
96 \hhline{~-~~}
97 parameter area & & & \\
98 \hhline{~-~~}
99 & \vdots & & \\
100 \hhline{~-~~}
101 \end{tabular}
102 \\
103 \\
104 \\
105 \caption{Stack layout on sparc32 calling convention}
106 \end{figure}
107