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- manual cleanup
author Tassilo Philipp
date Sun, 19 Mar 2017 20:09:59 +0100
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1 %//////////////////////////////////////////////////////////////////////////////
2 %
3 % Copyright (c) 2007,2009 Daniel Adler <dadler@uni-goettingen.de>,
4 % Tassilo Philipp <tphilipp@potion-studios.com>
5 %
6 % Permission to use, copy, modify, and distribute this software for any
7 % purpose with or without fee is hereby granted, provided that the above
8 % copyright notice and this permission notice appear in all copies.
9 %
10 % THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 % WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 % MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 % ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 % WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 % ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 % OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 %
18 %//////////////////////////////////////////////////////////////////////////////
19
20 \subsection{MIPS32 Calling Convention}
21
22 \paragraph{Overview}
23
24 Multiple revisions of the MIPS Instruction set exist, namely MIPS I, MIPS II, MIPS III, MIPS IV, MIPS32 and MIPS64.
25 Nowadays, MIPS32 and MIPS64 are the main ones used for 32-bit and 64-bit instruction sets, respectively.\\
26 Given MIPS processor are often used for embedded devices, several add-on extensions exist for the MIPS family, for example:
27
28 \begin{description}
29 \item [MIPS-3D] simple floating-point SIMD instructions dedicated to common 3D tasks.
30 \item [MDMX] (MaDMaX) more extensive integer SIMD instruction set using 64 bit floating-point registers.
31 \item [MIPS16e] adds compression to the instruction stream to make programs take up less room (allegedly a response to the THUMB instruction set of the ARM architecture).
32 \item [MIPS MT] multithreading additions to the system similar to HyperThreading.
33 \end{description}
34
35 Unfortunately, there is actually no such thing as "The MIPS Calling Convention". Many possible conventions are used
36 by many different environments such as \emph{O32}\cite{MIPSo32}, \emph{O64}\cite{MIPSo64}, \emph{N32}\cite{MIPSn32/n64}, \emph{N64}\cite{MIPSn32/n64}, \emph{EABI}\cite{MIPSeabi} and \emph{NUBI}\cite{MIPSnubi}.\\
37
38 \paragraph{\product{dyncall} support}
39
40 Currently, dyncall supports for MIPS 32-bit architectures the widely-used O32 calling convention (for big- and little-endian targets),
41 as well as EABI (which is used on the Homebrew SDK for the Playstation Portable). \product{dyncall} currently does not support MIPS16e
42 (contrary to the like-minded ARM-THUMB, which is supported). Both, calls and callbacks are supported.
43
44 \subsubsection{MIPS EABI 32-bit Calling Convention}
45
46 \paragraph{Register usage}
47
48 \begin{table}[h]
49 \begin{tabular*}{0.95\textwidth}{lll}
50 Name & Alias & Brief description\\
51 \hline
52 {\bf \$0} & {\bf \$zero} & Hardware zero \\
53 {\bf \$1} & {\bf \$at} & Assembler temporary \\
54 {\bf \$2-\$3} & {\bf \$v0-\$v1} & Integer results \\
55 {\bf \$4-\$11} & {\bf \$a0-\$a7} & Integer arguments, or double precision float arguments\\
56 {\bf \$12-\$15,\$24} & {\bf \$t4-\$t7,\$t8} & Integer temporaries \\
57 {\bf \$25} & {\bf \$t9} & Integer temporary, hold the address of the called function for all PIC calls (by convention) \\
58 {\bf \$16-\$23} & {\bf \$s0-\$s7} & Preserved \\
59 {\bf \$26,\$27} & {\bf \$kt0,\$kt1} & Reserved for kernel \\
60 {\bf \$28} & {\bf \$gp} & Global pointer, preserve \\
61 {\bf \$29} & {\bf \$sp} & Stack pointer, preserve \\
62 {\bf \$30} & {\bf \$s8} & Frame pointer, preserve \\
63 {\bf \$31} & {\bf \$ra} & Return address, preserve \\
64 {\bf hi, lo} & & Multiply/divide special registers \\
65 {\bf \$f0,\$f2} & & Float results \\
66 {\bf \$f1,\$f3,\$f4-\$f11,\$f20-\$f23} & & Float temporaries \\
67 {\bf \$f12-\$f19} & & Single precision float arguments \\
68 \end{tabular*}
69 \caption{Register usage on MIPS32 EABI calling convention}
70 \end{table}
71
72 \paragraph{Parameter passing}
73
74 \begin{itemize}
75 \item Stack grows down
76 \item Stack parameter order: right-to-left
77 \item Caller cleans up the stack
78 \item first 8 integers (\textless=\ 32bit) are passed in registers \$a0-\$a7
79 \item first 8 single precision floating point arguments are passed in registers \$f12-\$f19
80 \item if either integer or float registers are used up, the stack is used
81 \item 64-bit stack arguments are always aligned to 8 bytes
82 \item 64-bit integers or double precision floats are passed on two general purpose registers starting at an even register number, skipping one odd register
83 \item \$a0-\$a7 and \$f12-\$f19 are not required to be preserved
84 \item results are returned in \$v0 (32-bit), \$v0 and \$v1 (64-bit), \$f0 or \$f0 and \$f2 (2 $\times$ 32 bit float e.g. complex)
85 \end{itemize}
86
87 \paragraph{Stack layout}
88
89 Stack directly after function prolog:\\
90
91 \begin{figure}[h]
92 \begin{tabular}{5|3|1 1}
93 \hhline{~-~~}
94 & \vdots & & \\
95 \hhline{~=~~}
96 register save area & \hspace{4cm} & & \mrrbrace{5}{caller's frame} \\
97 \hhline{~-~~}
98 local data & & & \\
99 \hhline{~-~~}
100 \mrlbrace{3}{parameter area} & \ldots & \mrrbrace{3}{stack parameters} & \\
101 & \ldots & & \\
102 & \ldots & & \\
103 \hhline{~=~~}
104 register save area (with return address) & & & \mrrbrace{5}{current frame} \\
105 \hhline{~-~~}
106 local data & & & \\
107 \hhline{~-~~}
108 parameter area & & & \\
109 \hhline{~-~~}
110 & \vdots & & \\
111 \hhline{~-~~}
112 \end{tabular}
113 \caption{Stack layout on mips32 eabi calling convention}
114 \end{figure}
115
116 \newpage
117
118 \subsubsection{MIPS O32 32-bit Calling Convention}
119
120 \paragraph{Register usage}
121
122 \begin{table}[h]
123 \begin{tabular*}{0.95\textwidth}{lll}
124 Name & Alias & Brief description\\
125 \hline
126 {\bf \$0} & {\bf \$zero} & hardware zero \\
127 {\bf \$1} & {\bf \$at} & assembler temporary \\
128 {\bf \$2-\$3} & {\bf \$v0-\$v1} & return value, scratch \\
129 {\bf \$4-\$7} & {\bf \$a0-\$a3} & first integer arguments, scratch\\
130 {\bf \$8-\$15,\$24} & {\bf \$t0-\$t7,\$t8} & temporaries, scratch \\
131 {\bf \$25} & {\bf \$t9} & temporary, hold the address of the called function for all PIC calls (by convention) \\
132 {\bf \$16-\$23} & {\bf \$s0-\$s7} & preserved \\
133 {\bf \$26,\$27} & {\bf \$k0,\$k1} & reserved for kernel \\
134 {\bf \$28} & {\bf \$gp} & global pointer, preserved by caller \\
135 {\bf \$29} & {\bf \$sp} & stack pointer, preserve \\
136 {\bf \$30} & {\bf \$fp} & frame pointer, preserve \\
137 {\bf \$31} & {\bf \$ra} & return address, preserve \\
138 {\bf hi, lo} & & multiply/divide special registers \\
139 {\bf \$f0-\$f3} & & float return value, scratch \\
140 {\bf \$f4-\$f11,\$f16-\$f19} & & float temporaries, scratch \\
141 {\bf \$f12-\$f15} & & first floating point arguments, scratch \\
142 {\bf \$f20-\$f31} & & preserved \\
143 \end{tabular*}
144 \caption{Register usage on MIPS O32 calling convention}
145 \end{table}
146
147 \paragraph{Parameter passing}
148
149 \begin{itemize}
150 \item Stack grows down
151 \item Stack parameter order: right-to-left
152 \item Caller cleans up the stack
153 \item Caller is required to always leave a 16-byte spill area for\$a0-\$a3 at the and of {\bf its} frame, to be used and spilled to by the callee, if needed
154 \item The different stack areas (local data, register save area, parameter area) are each aligned to 8 bytes.
155 \item generally, first four 32bit arguments are passed in registers \$a0-\$a3, respectively (see below for exceptions if first arg is a float)
156 \item subsequent parameters are passed vie the stack
157 \item 64-bit params passed via registers are passed using either two registers (starting at an even register number, skipping an odd one if necessary), or via the stack using an 8-byte alignment
158 \item if the very first call argument is a float, up to 2 floats or doubles can be passed via \$f12 and \$f14, respectively, for first and second argument
159 \item if any arguments are passed via float registers, skip \$a0-\$a3 for subsequent arguments as if the values were passed via them
160 \item note that if the first argument is not a float, but the second, it'll get passed via the \$a? registers
161 \item results are returned in \$v0 (32-bit int return values), \$f0 (32-bit float), \$v0 and \$v1 (64-bit int), \$f0 and \$f3 (64bit float)
162 \end{itemize}
163
164 \paragraph{Stack layout}
165
166 Stack directly after function prolog:\\
167
168 \begin{figure}[h]
169 \begin{tabular}{5|3|1 1}
170 \hhline{~-~~}
171 & \vdots & & \\
172 \hhline{~=~~}
173 local data & \hspace{4cm} & & \mrrbrace{12}{caller's frame} \\
174 \hhline{~-~~}
175 register save area & return address & & \\
176 & s7 & & \\
177 & \vdots & & \\
178 & s0 & & \\
179 \hhline{~-~~}
180 \mrlbrace{7}{parameter area} & \ldots & \mrrbrace{3}{stack parameters} & \\
181 & \ldots & & \\
182 & \ldots & & \\
183 & a3 & \mrrbrace{4}{spill area} & \\
184 & a2 & & \\
185 & a1 & & \\
186 & a0 & & \\
187 \hhline{~=~~}
188 local data & & & \mrrbrace{5}{current frame} \\
189 \hhline{~-~~}
190 register save area (with return address) & & & \\
191 \hhline{~-~~}
192 parameter area & & & \\
193 & \vdots & & \\
194 \hhline{~-~~}
195 \end{tabular}
196 \caption{Stack layout on MIPS O32 calling convention}
197 \end{figure}
198
199 \newpage
200
201 \subsubsection{MIPS N32 32-bit Calling Convention}
202
203 @@@
204