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comparison dyncall/dyncall_call_arm32_thumb_armhf.S @ 36:93f315f02a32

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- armhf dyncall optimization/cleanup
author cslag
date Fri, 18 Dec 2015 01:07:40 +0100
parents 3e629dc19168
children f5577f6bf97a
comparison
equal deleted inserted replaced
35:61edd9cf8026 36:93f315f02a32
42 .code 16 42 .code 16
43 #endif 43 #endif
44 // .arch armv6 44 // .arch armv6
45 // .fpu vfp 45 // .fpu vfp
46 46
47 /*
48 1st arg / r0 = funptr
49 2st arg / r1 = ptr to int args
50 3st arg / r2 = size
51 4st arg / r3 = ptr to float args
52 */
47 GLOBAL_C(dcCall_arm32_armhf) 53 GLOBAL_C(dcCall_arm32_armhf)
48 .thumb_func 54 .thumb_func
49 ENTRY_C(dcCall_arm32_armhf) 55 ENTRY_C(dcCall_arm32_armhf)
50 56
51 /* Prolog. This function never needs to spill inside its prolog, so just store the permanent registers. */ 57 /* Prolog. This function never needs to spill inside its prolog, so just store the permanent registers. */
60 66
61 mov r4 , r0 /* r4 = 'fptr' (1st argument is passed in r0). */ 67 mov r4 , r0 /* r4 = 'fptr' (1st argument is passed in r0). */
62 mov r5 , r1 /* r5 = 'args' (2nd argument is passed in r1). */ 68 mov r5 , r1 /* r5 = 'args' (2nd argument is passed in r1). */
63 69
64 /* Load 16 single-precision registers (= 8 double-precision registers). */ 70 /* Load 16 single-precision registers (= 8 double-precision registers). */
65 flds s0, [r3,#0 ] 71 fldmiad r3, {d0-d7}
66 flds s1, [r3,#4 ]
67 flds s2, [r3,#8 ]
68 flds s3, [r3,#12]
69 flds s4, [r3,#16]
70 flds s5, [r3,#20]
71 flds s6, [r3,#24]
72 flds s7, [r3,#28]
73 flds s8, [r3,#32]
74 flds s9, [r3,#36]
75 flds s10, [r3,#40]
76 flds s11, [r3,#44]
77 flds s12, [r3,#48]
78 flds s13, [r3,#52]
79 flds s14, [r3,#56]
80 flds s15, [r3,#60]
81 72
82 sub r2 , #16 73 sub r2 , #16
83 cmp r2, #0 74 cmp r2, #0
84 ble armhf_call 75 ble armhf_call
85 76