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comparison dyncall/dyncall_call_arm32_arm_armhf.S @ 36:93f315f02a32

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- armhf dyncall optimization/cleanup
author cslag
date Fri, 18 Dec 2015 01:07:40 +0100
parents 3e629dc19168
children 9bd3c5219505
comparison
equal deleted inserted replaced
35:61edd9cf8026 36:93f315f02a32
39 .text 39 .text
40 .code 32 /* ARM mode */ 40 .code 32 /* ARM mode */
41 .arch armv6 41 .arch armv6
42 .fpu vfp 42 .fpu vfp
43 43
44 /*
45 1st arg / r0 = funptr
46 2st arg / r1 = ptr to int args
47 3st arg / r2 = size
48 4st arg / r3 = ptr to float args
49 */
44 GLOBAL_C(dcCall_arm32_armhf) 50 GLOBAL_C(dcCall_arm32_armhf)
45 ENTRY_C(dcCall_arm32_armhf) 51 ENTRY_C(dcCall_arm32_armhf)
46 52
47 /* Prolog. This function never needs to spill inside its prolog, so just store the permanent registers. */ 53 /* Prolog. This function never needs to spill inside its prolog, so just store the permanent registers. */
48 mov r12 , r13 /* Stack ptr (r13) -> temporary (r12). */ 54 mov r12 , r13 /* Stack ptr (r13) -> temporary (r12). */
51 mov r11 , r12 /* Set frame ptr. */ 57 mov r11 , r12 /* Set frame ptr. */
52 mov r4 , r0 /* r4 = 'fptr' (1st argument is passed in r0). */ 58 mov r4 , r0 /* r4 = 'fptr' (1st argument is passed in r0). */
53 mov r5 , r1 /* r5 = 'args' (2nd argument is passed in r1). */ 59 mov r5 , r1 /* r5 = 'args' (2nd argument is passed in r1). */
54 60
55 /* Load 16 single-precision registers (= 8 double-precision registers). */ 61 /* Load 16 single-precision registers (= 8 double-precision registers). */
56 flds s0, [r3,#0 ] 62 fldmiad r3, {d0-d7}
57 flds s1, [r3,#4 ]
58 flds s2, [r3,#8 ]
59 flds s3, [r3,#12]
60 flds s4, [r3,#16]
61 flds s5, [r3,#20]
62 flds s6, [r3,#24]
63 flds s7, [r3,#28]
64 flds s8, [r3,#32]
65 flds s9, [r3,#36]
66 flds s10, [r3,#40]
67 flds s11, [r3,#44]
68 flds s12, [r3,#48]
69 flds s13, [r3,#52]
70 flds s14, [r3,#56]
71 flds s15, [r3,#60]
72 63
73 sub r2 , r2 , #16 64 sub r2 , r2 , #16
74 cmp r2, #0 65 cmp r2, #0
75 ble armhf_call 66 ble armhf_call
76 67