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comparison doc/manual/callconvs/callconv_arm32.tex @ 173:8402121e1737

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- doc tweaks
author cslag
date Wed, 08 Feb 2017 12:54:05 +0100
parents 12729fd52ab7
children 703d102cb580
comparison
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172:b27557033057 173:8402121e1737
34 {\bf THUMB} & compressed instruction set using 16bit wide instruction encoding\\ 34 {\bf THUMB} & compressed instruction set using 16bit wide instruction encoding\\
35 \end{tabular*} 35 \end{tabular*}
36 \\ 36 \\
37 \\ 37 \\
38 For more details, take a look at the ARM-THUMB Procedure Call Standard (ATPCS) \cite{ATPCS}, the Procedure Call Standard for the ARM Architecture (AAPCS) \cite{AAPCS}, as well as the Debian ARM EABI port wiki \cite{armeabi}.\\ 38 For more details, take a look at the ARM-THUMB Procedure Call Standard (ATPCS) \cite{ATPCS}, the Procedure Call Standard for the ARM Architecture (AAPCS) \cite{AAPCS}, as well as the Debian ARM EABI port wiki \cite{armeabi}.\\
39 39 \\
40 \paragraph{\product{dyncall} support} 40 \paragraph{\product{dyncall} support}
41 41
42 Currently, the \product{dyncall} library supports the ARM and THUMB mode of the ARM32 family (ATPCS \cite{ATPCS} and EABI \cite{armeabi}), excluding manually triggered ARM-THUMB interworking calls. Although it's quite possible that the current implementation runs on other ARM processor families as well, please note that only the ARMv4t family has been thoroughly tested at the time of writing. Please report if the code runs on other ARM families, too.\\ 42 Currently, the \product{dyncall} library supports the ARM and THUMB mode of the ARM32 family (ATPCS \cite{ATPCS} and EABI \cite{armeabi}), excluding manually triggered ARM-THUMB interworking calls. Although it's quite possible that the current implementation runs on other ARM processor families as well, please note that only the ARMv4t family has been thoroughly tested at the time of writing. Please report if the code runs on other ARM families, too.\\
43 It is important to note, that dyncall supports the ARM architecture calling convention variant {\bf with floating point hardware disabled} (meaning that the FPA and the VFP (scalar mode) procedure call standards are not supported). 43 It is important to note, that dyncall supports the ARM architecture calling convention variant {\bf with floating point hardware disabled} (meaning that the FPA and the VFP (scalar mode) procedure call standards are not supported).
44 This processor family features some instruction sets accelerating DSP and multimedia application like the ARM Jazelle Technology (direct Java bytecode execution, providing acceleration for some bytecodes while calling software code for others), etc. that are not supported by the dyncall library.\\ 44 This processor family features some instruction sets accelerating DSP and multimedia application like the ARM Jazelle Technology (direct Java bytecode execution, providing acceleration for some bytecodes while calling software code for others), etc. that are not supported by the dyncall library.\\
224 8-byte aligned at function entries, as well as for 64 bit parameters. The latter 224 8-byte aligned at function entries, as well as for 64 bit parameters. The latter
225 are aligned on 8-byte boundaries on the stack and 2-registers for a parameter 225 are aligned on 8-byte boundaries on the stack and 2-registers for a parameter
226 passed via register. In order to achieve such an alignment, a register might 226 passed via register. In order to achieve such an alignment, a register might
227 have to be skipped for parameters passed via registers, or 4-bytes on the stack 227 have to be skipped for parameters passed via registers, or 4-bytes on the stack
228 for parameters passed via the stack. Refer to the Debian ARM EABI port wiki 228 for parameters passed via the stack. Refer to the Debian ARM EABI port wiki
229 for more information \cite{armeabi}. 229 for more information \cite{armeabi}.\\
230 230 \\
231
232 \paragraph{Status} 231 \paragraph{Status}
233 232
234 \begin{itemize} 233 \begin{itemize}
235 \item The EABI THUMB mode is tested and works fine (contrary to the ATPCS). 234 \item The EABI THUMB mode is tested and works fine (contrary to the ATPCS).
236 \item Ellipse calls do not work. 235 \item Ellipse calls do not work.
241 240
242 \subsubsection{ARM on Apple's iOS (Darwin) Platform} 241 \subsubsection{ARM on Apple's iOS (Darwin) Platform}
243 242
244 243
245 The iOS runs on ARMv6 (iOS 2.0) and ARMv7 (iOS 3.0) architectures. 244 The iOS runs on ARMv6 (iOS 2.0) and ARMv7 (iOS 3.0) architectures.
246 Typically code is compiled in Thumb mode. 245 Typically code is compiled in Thumb mode.\\
247 246 \\
248 \paragraph{Register usage} 247 \paragraph{Register usage}
249 248
250 \begin{table}[h] 249 \begin{table}[h]
251 \begin{tabular*}{0.95\textwidth}{3 B} 250 \begin{tabular*}{0.95\textwidth}{3 B}
252 Name & Brief description\\ 251 Name & Brief description\\
285 284
286 Most debian-based Linux systems on ARMv7 (or ARMv6 with FPU) platforms use a calling convention referred to 285 Most debian-based Linux systems on ARMv7 (or ARMv6 with FPU) platforms use a calling convention referred to
287 as armhf, using 16 32-bit floating point registers of the FPU of the VFPv3-D16 extension to the ARM architecture. 286 as armhf, using 16 32-bit floating point registers of the FPU of the VFPv3-D16 extension to the ARM architecture.
288 The instruction set used for armhf is Thumb-2. Refer to the debian wiki for more information \cite{armhf}. 287 The instruction set used for armhf is Thumb-2. Refer to the debian wiki for more information \cite{armhf}.
289 288
290 Code is little-endian, rest is similar to EABI with an 8-byte aligned stack, etc.. 289 Code is little-endian, rest is similar to EABI with an 8-byte aligned stack, etc..\\
291 290 \\
292 \paragraph{Register usage} 291 \paragraph{Register usage}
293 292
294 \begin{table}[h] 293 \begin{table}[h]
295 \begin{tabular*}{0.95\textwidth}{3 B} 294 \begin{tabular*}{0.95\textwidth}{3 B}
296 Name & Brief description\\ 295 Name & Brief description\\