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comparison doc/manual/callconvs/callconv_ppc32.tex @ 331:74c056b597b7

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- disassembly example annotations - callconv appendix in doc: * ppc64 chapter * some cleanups for consistency
author Tassilo Philipp
date Sat, 23 Nov 2019 13:51:35 +0100
parents 276eb8c87aa0
children c607d67cd6b8
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330:4e6f63b7020e 331:74c056b597b7
26 26
27 \begin{itemize} 27 \begin{itemize}
28 \item Word size is 32 bits 28 \item Word size is 32 bits
29 \item Big endian (MSB) and litte endian (LSB) operating modes. 29 \item Big endian (MSB) and litte endian (LSB) operating modes.
30 \item Processor operates on floats in double precision floating point arithmetc (IEEE-754) values directly (single precision is converted on the fly) 30 \item Processor operates on floats in double precision floating point arithmetc (IEEE-754) values directly (single precision is converted on the fly)
31 \item Apple Mac OS X/Darwin PPC is specified in "Mac OS X ABI Function Call Guide"\cite{ppcMacOSX}. It uses Big Endian (MSB). 31 \item Apple macos/Mac OS X/Darwin PPC is specified in "Mac OS X ABI Function Call Guide"\cite{ppcMacOSX}. It uses Big Endian (MSB)
32 \item Linux PPC 32-bit ABI is specified in "LSB for PPC"\cite{ppc32LSB} which is based on "System V ABI". It uses Big Endian (MSB). 32 \item Linux PPC 32-bit ABI is specified in "LSB for PPC"\cite{ppc32LSB} which is based on "System V ABI". It uses Big Endian (MSB)
33 \item PowerPC EABI is defined in the "PowerPC Embedded Application Binary Interface 32-Bit Implementation". 33 \item PowerPC EABI is defined in the "PowerPC Embedded Application Binary Interface 32-Bit Implementation"\cite{ppceabi}
34 \item There is also the "PowerOpen ABI"\cite{poabi}, a nearly identical version of it is used in AIX % more info: http://www.ingallegri.com/public/ppc.html
34 \end{itemize} 35 \end{itemize}
35 36
36 \paragraph{\product{dyncall} support} 37 \paragraph{\product{dyncall} support}
37 38
38 \product{Dyncall} and \product{dyncallback} are supported for PowerPC (32bit) Big Endian (MSB), for Darwin's and System V's calling convention. 39 \product{Dyncall} and \product{dyncallback} are supported for PowerPC (32bit) Big Endian (MSB), for Darwin's and System V's calling convention.
74 \begin{itemize} 75 \begin{itemize}
75 \item stack grows down 76 \item stack grows down
76 \item stack parameter order: right-to-left 77 \item stack parameter order: right-to-left
77 \item caller cleans up the stack 78 \item caller cleans up the stack
78 \item the first 8 integer parameters are passed in registers gpr3-gpr10 79 \item the first 8 integer parameters are passed in registers gpr3-gpr10
79 \item the first 12 floating point parameters are passed in registers fpr1-fpr13 80 \item the first 13 floating point parameters are passed in registers fpr1-fpr13
80 \item 64 bit arguments are passed as if they were two 32 bit arguments, without skipping registers for alignment (this means passing half via a register and half via the stack is allowed) 81 \item 64 bit arguments are passed as if they were two 32 bit arguments, without skipping registers for alignment (this means passing half via a register and half via the stack is allowed)
81 \item if a float parameter is passed via a register, gpr registers are skipped for subsequent integer parameters (based on the size of 82 \item if a float parameter is passed via a register, gpr registers are skipped for subsequent integer parameters (based on the size of
82 the float - 1 register for single precision and 2 for double precision floating point values) 83 the float - 1 register for single precision and 2 for double precision floating point values)
83 \item the caller pushes subsequent parameters onto the stack 84 \item the caller pushes subsequent parameters onto the stack
84 \item for every parameter passed via a register, space is reserved in the stack parameter area (in order to spill the parameters if 85 \item for every parameter passed via a register, space is reserved in the stack parameter area (in order to spill the parameters if
85 needed - e.g. varargs) 86 needed - e.g. varargs)
86 \item ellipsis calls take floating point values in int and float registers (single precision floats are promoted to double precision 87 \item ellipsis calls take floating point values in int and float registers (single precision floats are promoted to double precision as
87 as defined for ellipsis calls) 88 required by ellipsis calls)
88 \item all nonvector parameters are aligned on 4-byte boundaries 89 \item all nonvector parameters are aligned on 4-byte boundaries
89 \item vector parameters are aligned on 16-byte boundaries 90 \item vector parameters are aligned on 16-byte boundaries
90 \item composite parameters with size of 1 or 2 bytes occupy low-order bytes of their 4-byte area. INCONSISTENT with other 32-bit PPC 91 \item composite parameters with size of 1 or 2 bytes occupy low-order bytes of their 4-byte area. INCONSISTENT with other 32-bit PPC
91 binary interfaces. In AIX and OS 9, padding bytes always follow the data structure 92 binary interfaces. In AIX and mac OS 9, padding bytes always follow the data structure
92 \item composite parameters 3 bytes or larger in size occupy high-order bytes 93 \item composite parameters 3 bytes or larger in size occupy high-order bytes
93 \item integer parameters \textless\ 32 bit are right-justified (meaning occupy higher-address bytes) in their 4-byte slot on the stack, requiring extra-care for big-endian targets 94 \item integer parameters \textless\ 32 bit are right-justified (meaning occupy higher-address bytes) in their 4-byte slot on the stack, requiring extra-care for big-endian targets
94 \end{itemize} 95 \end{itemize}
95 96
96 97