Mercurial > pub > dyncall > dyncall
comparison doc/manual/callconvs/callconv_mips32.tex @ 478:6c72cb768099
callconv doc:
- mips o32 update w/ regards to aggregates
- mips o32 disas examples
- sparc64 doc fixes
author | Tassilo Philipp |
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date | Tue, 01 Mar 2022 00:16:50 +0100 |
parents | b47168dacba6 |
children | a55506bf924e |
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477:75c19f11b86a | 478:6c72cb768099 |
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1 %////////////////////////////////////////////////////////////////////////////// | 1 %////////////////////////////////////////////////////////////////////////////// |
2 % | 2 % |
3 % Copyright (c) 2007-2019 Daniel Adler <dadler@uni-goettingen.de>, | 3 % Copyright (c) 2007-2022 Daniel Adler <dadler@uni-goettingen.de>, |
4 % Tassilo Philipp <tphilipp@potion-studios.com> | 4 % Tassilo Philipp <tphilipp@potion-studios.com> |
5 % | 5 % |
6 % Permission to use, copy, modify, and distribute this software for any | 6 % Permission to use, copy, modify, and distribute this software for any |
7 % purpose with or without fee is hereby granted, provided that the above | 7 % purpose with or without fee is hereby granted, provided that the above |
8 % copyright notice and this permission notice appear in all copies. | 8 % copyright notice and this permission notice appear in all copies. |
86 \item 64-bit stack arguments are always aligned to 8 bytes | 86 \item 64-bit stack arguments are always aligned to 8 bytes |
87 \item 64-bit integers or double precision floats are passed in two general purpose registers starting at an even register number, skipping one odd register | 87 \item 64-bit integers or double precision floats are passed in two general purpose registers starting at an even register number, skipping one odd register |
88 \item if either integer or float registers are used up, the stack is used | 88 \item if either integer or float registers are used up, the stack is used |
89 \item if the callee takes the address of one of the parameters and uses it to address other unnamed parameters (e.g. varargs) it has to copy - in its prolog - the the argument registers to a reserved stack area adjacent to the other parameters on the stack (only the unnamed integer parameters require saving, though) % @@@ seems to *ONLY* spill with varargs, never for any other reason | 89 \item if the callee takes the address of one of the parameters and uses it to address other unnamed parameters (e.g. varargs) it has to copy - in its prolog - the the argument registers to a reserved stack area adjacent to the other parameters on the stack (only the unnamed integer parameters require saving, though) % @@@ seems to *ONLY* spill with varargs, never for any other reason |
90 \item float registers don't seem to ever need to be saved that way, because floats passed to an ellipsis function are promoted to doubles, which in turn are passed in a? register pairs, so only \$a0-\$a7 are need to be spilled | 90 \item float registers don't seem to ever need to be saved that way, because floats passed to an ellipsis function are promoted to doubles, which in turn are passed in a? register pairs, so only \$a0-\$a7 are need to be spilled |
91 \end{itemize} | |
92 | |
93 \paragraph{Return values} | |
94 | |
95 \begin{itemize} | |
91 \item results are returned in \$v0 (32-bit), \$v0 and \$v1 (64-bit), \$f0 or \$f0 and \$f2 (2 $\times$ 32 bit float e.g. complex) | 96 \item results are returned in \$v0 (32-bit), \$v0 and \$v1 (64-bit), \$f0 or \$f0 and \$f2 (2 $\times$ 32 bit float e.g. complex) |
92 \end{itemize} | 97 \end{itemize} |
93 | 98 |
94 \paragraph{Stack layout} | 99 \paragraph{Stack layout} |
95 | 100 |
166 \item subsequent parameters are passed vie the stack | 171 \item subsequent parameters are passed vie the stack |
167 \item 64-bit params passed via registers are passed using either two registers (starting at an even register number, skipping an odd one if necessary), or via the stack using an 8-byte alignment | 172 \item 64-bit params passed via registers are passed using either two registers (starting at an even register number, skipping an odd one if necessary), or via the stack using an 8-byte alignment |
168 \item only on hard-float targets: if the very first call argument is a float, up to 2 floats or doubles can be passed via \$f12 and \$f14, respectively, for first and second argument | 173 \item only on hard-float targets: if the very first call argument is a float, up to 2 floats or doubles can be passed via \$f12 and \$f14, respectively, for first and second argument |
169 \item only on hard-float targets: if any arguments are passed via float registers, skip \$a0-\$a3 for subsequent arguments as if the values were passed via them | 174 \item only on hard-float targets: if any arguments are passed via float registers, skip \$a0-\$a3 for subsequent arguments as if the values were passed via them |
170 \item only on hard-float targets: note that if the first argument is not a float, but the second, it'll get passed via the \$a? registers | 175 \item only on hard-float targets: note that if the first argument is not a float, but the second, it'll get passed via the \$a? registers |
176 \item single precision float parameters (32 bit) are right-justified in their 8-byte slot on the stack on big endian targets, as they aren't promoted % @@@ verify | |
177 \item aggregates (struct, union) are passed as a sequence of words like integers, no matter the fields or if hard-float target (splitting across registers and stack is allowed) | |
178 \end{itemize} | |
179 | |
180 \paragraph{Return values} | |
181 | |
182 \begin{itemize} | |
171 \item results are returned in \$v0 and \$v1, with \$v0 for all values \textless\ 64bit (only integer on hard-float targets) | 183 \item results are returned in \$v0 and \$v1, with \$v0 for all values \textless\ 64bit (only integer on hard-float targets) |
172 \item only on hard-float targets: floating point results are returned in \$f0 (32-bit float), or \$f0 and \$f3 (64bit float) | 184 \item only on hard-float targets: floating point results are returned in \$f0 (32-bit float), or \$f0 and \$f3 (64bit float) |
173 \item single precision float parameters (32 bit) are right-justified in their 8-byte slot on the stack on big endian targets, as they aren't promoted @@@ | 185 \item aggregates (struct, union) of any size are returned in a space allocated by the caller, with a pointer to it |
186 passed as first parameter to the function called (meaning in \%a0) | |
174 \end{itemize} | 187 \end{itemize} |
175 | 188 |
176 \paragraph{Stack layout} | 189 \paragraph{Stack layout} |
177 | 190 |
178 % verified/amended: TP nov 2019 (see also doc/disas_examples/mips.o32.disas) | 191 % verified/amended: TP nov 2019 (see also doc/disas_examples/mips.o32.disas) |