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comparison doc/manual/callconvs/callconv_arm64.tex @ 404:524fdca405bf

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- some doc/manual callconv clarifications for arm
author Tassilo Philipp
date Wed, 07 Apr 2021 18:39:46 +0200
parents bac52ab8869f
children b47168dacba6
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403:a3e47b7c808c 404:524fdca405bf
42 Also, there is {\bf sp/xzr/wzr}, a register with restricted use, used for the 42 Also, there is {\bf sp/xzr/wzr}, a register with restricted use, used for the
43 stack pointer in instructions dealing with the stack ({\bf sp}) or a hardware 43 stack pointer in instructions dealing with the stack ({\bf sp}) or a hardware
44 zero register for all other instructions {\bf xzr/wzr}, and {\bf pc}, the 44 zero register for all other instructions {\bf xzr/wzr}, and {\bf pc}, the
45 program counter. Additionally, there are thirty-two 128 bit registers {\bf v0-v31}, 45 program counter. Additionally, there are thirty-two 128 bit registers {\bf v0-v31},
46 to be used as SIMD and floating point registers, referred to as {\bf q0-q31}, {\bf d0-d31} 46 to be used as SIMD and floating point registers, referred to as {\bf q0-q31}, {\bf d0-d31}
47 and {\bf s0-s31}, respectively, depending on their use:\\ 47 and {\bf s0-s31}, respectively (in contrast to AArch32, those do not overlap multiple
48 narrower registers), depending on their use:\\
48 49
49 \begin{table}[h] 50 \begin{table}[h]
50 \begin{tabular*}{0.95\textwidth}{3 B} 51 \begin{tabular*}{0.95\textwidth}{3 B}
51 Name & Brief description\\ 52 Name & Brief description\\
52 \hline 53 \hline
59 {\bf x19-x28} & permanent\\ 60 {\bf x19-x28} & permanent\\
60 {\bf x29} & permanent, frame pointer\\ 61 {\bf x29} & permanent, frame pointer\\
61 {\bf x30} & permanent, link register\\ 62 {\bf x30} & permanent, link register\\
62 {\bf sp} & permanent, stack pointer\\ 63 {\bf sp} & permanent, stack pointer\\
63 {\bf pc} & program counter\\ 64 {\bf pc} & program counter\\
65 {\bf v0} & scratch, first float parameter, float return value\\
66 {\bf v1-v7} & scratch, float parameters\\
67 {\bf v8-v15} & lower 64 bits are permanent, scratch\\
68 {\bf v16-v31} & scratch\\
64 \end{tabular*} 69 \end{tabular*}
65 \caption{Register usage on arm64} 70 \caption{Register usage on arm64}
66 \end{table} 71 \end{table}
67 72
68 \paragraph{Parameter passing} 73 \paragraph{Parameter passing}
72 \item caller cleans up the stack 77 \item caller cleans up the stack
73 \item first 8 integer arguments are passed using x0-x7 78 \item first 8 integer arguments are passed using x0-x7
74 \item first 8 floating point arguments are passed using d0-d7 79 \item first 8 floating point arguments are passed using d0-d7
75 \item subsequent parameters are pushed onto the stack 80 \item subsequent parameters are pushed onto the stack
76 \item if the callee takes the address of one of the parameters and uses it to address other parameters (e.g. varargs) it has to copy - in its prolog - the first 8 integer and 8 floating-point registers to a reserved stack area adjacent to the other parameters on the stack (only the unnamed integer parameters require saving, though) 81 \item if the callee takes the address of one of the parameters and uses it to address other parameters (e.g. varargs) it has to copy - in its prolog - the first 8 integer and 8 floating-point registers to a reserved stack area adjacent to the other parameters on the stack (only the unnamed integer parameters require saving, though)
77 \item structures and unions are passed by value, with the first four words of the parameters in r0-r3 82 \item structures and unions up to 16 bytes in size are passed by value (after rounding up the size to the nearest multiple of 8), as a sequence of dwords
83 \item for a structure or union larger than 16 bytes in size, a pointer to it is passed
78 \item if return value is a structure, a pointer pointing to the return value's space is passed in r0, the first parameter in r1, etc... (see {\bf return values}) 84 \item if return value is a structure, a pointer pointing to the return value's space is passed in r0, the first parameter in r1, etc... (see {\bf return values})
79 \item stack is required to be throughout eight-byte aligned 85 \item stack is required to be throughout eight-byte aligned
80 \end{itemize} 86 \end{itemize}
81 87
82 \paragraph{Return values} 88 \paragraph{Return values}