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comparison dyncallback/dyncall_thunk_mips64.c @ 137:4b5ae110848c

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- mips64 callback fixes for addresses using high word bits
author cslag
date Sat, 23 Jul 2016 20:22:50 +0200
parents 277f0eec3b29
children f5577f6bf97a
comparison
equal deleted inserted replaced
136:277f0eec3b29 137:4b5ae110848c
35 35
36 Thunk Register: $t8 ($24) 36 Thunk Register: $t8 ($24)
37 Call Address (sticking to t9 as for PIC calls on mips32): $t9 ($25) 37 Call Address (sticking to t9 as for PIC calls on mips32): $t9 ($25)
38 38
39 mips64 thunk code: 39 mips64 thunk code:
40 lui $t8, p[48:63] 40 lui $t8, p[48:63]
41 ori $t8, $t8, p[32:47] 41 ori $t8, $t8, p[32:47]
42 sll $t8, 16 42 dsll $t8, 16
43 ori $t8, $t8, p[16:31] 43 ori $t8, $t8, p[16:31]
44 sll $t8, 16 44 dsll $t8, 16
45 lui $t9, entry[48:63] 45 lui $t9, entry[48:63]
46 ori $t9, $t9, entry[32:47] 46 ori $t9, $t9, entry[32:47]
47 sll $t9, 16 47 dsll $t9, 16
48 ori $t9, $t9, entry[16:31] 48 ori $t9, $t9, entry[16:31]
49 sll $t9, 16 49 dsll $t9, 16
50 ori $t9, $t9, entry[0:15] 50 ori $t9, $t9, entry[0:15]
51 jr $t9 51 jr $t9
52 ori $t8, $t8, p[0:15] ; branch delay slot 52 ori $t8, $t8, p[0:15] ; branch delay slot
53 53
54 Disassembly of section .text: 54 Disassembly of section .text:
55 55
56 0000000000000000 <thunk>: 56 0000000000000000 <thunk>:
57 0: 3c180000 lui t8,0x0 57 0: 3c180000 lui t8,0x0
58 4: 37180000 ori t8,t8,0x0 58 4: 37180000 ori t8,t8,0x0
59 8: 0018c400 sll t8,t8,0x10 59 8: 0018c438 dsll t8,t8,0x10
60 c: 37180000 ori t8,t8,0x0 60 c: 37180000 ori t8,t8,0x0
61 10: 0018c400 sll t8,t8,0x10 61 10: 0018c438 dsll t8,t8,0x10
62 14: 3c190000 lui t9,0x0 62 14: 3c190000 lui t9,0x0
63 18: 37390000 ori t9,t9,0x0 63 18: 37390000 ori t9,t9,0x0
64 1c: 0019cc00 sll t9,t9,0x10 64 1c: 0019cc38 dsll t9,t9,0x10
65 20: 37390000 ori t9,t9,0x0 65 20: 37390000 ori t9,t9,0x0
66 24: 0019cc00 sll t9,t9,0x10 66 24: 0019cc38 dsll t9,t9,0x10
67 28: 37390000 ori t9,t9,0x0 67 28: 37390000 ori t9,t9,0x0
68 2c: 03200008 jr t9 68 2c: 03200008 jr t9
69 30: 37180000 ori t8,t8,0x0 69 30: 37180000 ori t8,t8,0x0
70 70
71 */ 71 */
92 p->text.s[21] = 0x3739; p->text.s[20] = b_00_15(entry); /* ori $t9, $t9, entry[0:15] */ 92 p->text.s[21] = 0x3739; p->text.s[20] = b_00_15(entry); /* ori $t9, $t9, entry[0:15] */
93 p->text.s[25] = 0x3718; p->text.s[24] = b_00_15(p); /* ori $t8, $t8, p[0:15] - branch delay slot */ 93 p->text.s[25] = 0x3718; p->text.s[24] = b_00_15(p); /* ori $t8, $t8, p[0:15] - branch delay slot */
94 94
95 #endif 95 #endif
96 96
97 p->text.i[ 2] = 0x0018c400; /* sll t8,t8,0x10 */ 97 p->text.i[ 2] = 0x0018c438; /* dsll t8,t8,0x10 */
98 p->text.i[ 4] = 0x0018c400; /* sll t8,t8,0x10 */ 98 p->text.i[ 4] = 0x0018c438; /* dsll t8,t8,0x10 */
99 p->text.i[ 7] = 0x0019cc00; /* sll t9,t9,0x10 */ 99 p->text.i[ 7] = 0x0019cc38; /* dsll t9,t9,0x10 */
100 p->text.i[ 9] = 0x0019cc00; /* sll t9,t9,0x10 */ 100 p->text.i[ 9] = 0x0019cc38; /* dsll t9,t9,0x10 */
101 p->text.i[11] = 0x03200008; /* jr $t9 */ 101 p->text.i[11] = 0x03200008; /* jr $t9 */
102 } 102 }
103 103