Mercurial > pub > dyncall > dyncall
comparison doc/manual/callconvs/callconv_arm32.tex @ 117:4a64b733dc76
- doc, added first version of mips64 callconv page
- cleanups, todo update
| author | cslag |
|---|---|
| date | Sun, 03 Jul 2016 01:39:37 +0200 |
| parents | 9e99918065e6 |
| children | 12729fd52ab7 |
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| 116:c5cb02203df4 | 117:4a64b733dc76 |
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| 1 % | 1 % |
| 2 % Copyright (c) 2007,2010 Daniel Adler <dadler@uni-goettingen.de>, | 2 % Copyright (c) 2007,2010 Daniel Adler <dadler@uni-goettingen.de>, |
| 3 % Tassilo Philipp <tphilipp@potion-studios.com> | 3 % Tassilo Philipp <tphilipp@potion-studios.com> |
| 4 % | 4 % |
| 5 % Permission to use, copy, modify, and distribute this software for any | 5 % Permission to use, copy, modify, and distribute this software for any |
| 6 % purpose with or without fee is hereby granted, provided that the above | 6 % purpose with or without fee is hereby granted, provided that the above |
| 7 % copyright notice and this permission notice appear in all copies. | 7 % copyright notice and this permission notice appear in all copies. |
| 20 % ================================================== | 20 % ================================================== |
| 21 \subsection{ARM32 Calling Convention} | 21 \subsection{ARM32 Calling Convention} |
| 22 | 22 |
| 23 \paragraph{Overview} | 23 \paragraph{Overview} |
| 24 | 24 |
| 25 The ARM32 family of processors is based on | 25 The ARM32 family of processors is based on the Advanced RISC Machines (ARM) |
| 26 the Advanced RISC Machines (ARM) processor architecture (32 bit RISC). | 26 processor architecture (32 bit RISC). |
| 27 The word size is 32 bits (and the programming model is LLP64).\\ | 27 The word size is 32 bits (and the programming model is LLP64).\\ |
| 28 Basically, this family of microprocessors can be run in 2 major modes:\\ | 28 Basically, this family of microprocessors can be run in 2 major modes:\\ |
| 29 \\ | 29 \\ |
| 30 \begin{tabular*}{0.95\textwidth}{2 B} | 30 \begin{tabular*}{0.95\textwidth}{2 B} |
| 31 Mode & Description\\ | 31 Mode & Description\\ |
| 100 & \vdots & & \\ | 100 & \vdots & & \\ |
| 101 \hhline{~=~~} | 101 \hhline{~=~~} |
| 102 register save area & \hspace{4cm} & & \mrrbrace{5}{caller's frame} \\ | 102 register save area & \hspace{4cm} & & \mrrbrace{5}{caller's frame} \\ |
| 103 \hhline{~-~~} | 103 \hhline{~-~~} |
| 104 local data & & & \\ | 104 local data & & & \\ |
| 105 \hhline{~-~~} | 105 \hhline{~-~~} |
| 106 \mrlbrace{7}{parameter area} & \ldots & \mrrbrace{3}{stack parameters} & \\ | 106 \mrlbrace{7}{parameter area} & \ldots & \mrrbrace{3}{stack parameters} & \\ |
| 107 & \ldots & & \\ | 107 & \ldots & & \\ |
| 108 & \ldots & & \\ | 108 & \ldots & & \\ |
| 109 \hhline{~=~~} | 109 \hhline{~=~~} |
| 110 & r3 & \mrrbrace{4}{spill area (if needed)} & \mrrbrace{7}{current frame} \\ | 110 & r3 & \mrrbrace{4}{spill area (if needed)} & \mrrbrace{7}{current frame} \\ |
| 111 & r2 & & \\ | 111 & r2 & & \\ |
| 112 & r1 & & \\ | 112 & r1 & & \\ |
| 113 & r0 & & \\ | 113 & r0 & & \\ |
| 114 \hhline{~-~~} | 114 \hhline{~-~~} |
| 115 register save area (with return address) & & & \\ | 115 register save area (with return address) & & & \\ |
| 116 \hhline{~-~~} | 116 \hhline{~-~~} |
| 117 local data & & & \\ | 117 local data & & & \\ |
| 118 \hhline{~-~~} | 118 \hhline{~-~~} |
| 119 parameter area & \vdots & & \\ | 119 parameter area & \vdots & & \\ |
| 120 \hhline{~-~~} | 120 \hhline{~-~~} |
| 121 \end{tabular} | 121 \end{tabular} |
| 122 \caption{Stack layout on arm32} | 122 \caption{Stack layout on arm32} |
| 123 \end{figure} | 123 \end{figure} |
| 186 | 186 |
| 187 \begin{figure}[h] | 187 \begin{figure}[h] |
| 188 \begin{tabular}{5|3|1 1} | 188 \begin{tabular}{5|3|1 1} |
| 189 \hhline{~-~~} | 189 \hhline{~-~~} |
| 190 & \vdots & & \\ | 190 & \vdots & & \\ |
| 191 \hhline{~=~~} | 191 \hhline{~=~~} |
| 192 register save area & \hspace{4cm} & & \mrrbrace{5}{caller's frame} \\ | 192 register save area & \hspace{4cm} & & \mrrbrace{5}{caller's frame} \\ |
| 193 \hhline{~-~~} | 193 \hhline{~-~~} |
| 194 local data & & & \\ | 194 local data & & & \\ |
| 195 \hhline{~-~~} | 195 \hhline{~-~~} |
| 196 \mrlbrace{7}{parameter area} & \ldots & \mrrbrace{3}{stack parameters} & \\ | 196 \mrlbrace{7}{parameter area} & \ldots & \mrrbrace{3}{stack parameters} & \\ |
| 197 & \ldots & & \\ | 197 & \ldots & & \\ |
| 198 & \ldots & & \\ | 198 & \ldots & & \\ |
| 199 \hhline{~=~~} | 199 \hhline{~=~~} |
| 200 & r3 & \mrrbrace{4}{spill area (if needed)} & \mrrbrace{7}{current frame} \\ | 200 & r3 & \mrrbrace{4}{spill area (if needed)} & \mrrbrace{7}{current frame} \\ |
| 201 & r2 & & \\ | 201 & r2 & & \\ |
| 202 & r1 & & \\ | 202 & r1 & & \\ |
| 203 & r0 & & \\ | 203 & r0 & & \\ |
| 204 \hhline{~-~~} | 204 \hhline{~-~~} |
| 205 register save area (with return address) & & & \\ | 205 register save area (with return address) & & & \\ |
| 206 \hhline{~-~~} | 206 \hhline{~-~~} |
| 207 local data & & & \\ | 207 local data & & & \\ |
| 208 \hhline{~-~~} | 208 \hhline{~-~~} |
| 209 parameter area & \vdots & & \\ | 209 parameter area & \vdots & & \\ |
| 210 \hhline{~-~~} | 210 \hhline{~-~~} |
| 211 \end{tabular} | 211 \end{tabular} |
| 212 \caption{Stack layout on arm32 thumb mode} | 212 \caption{Stack layout on arm32 thumb mode} |
| 213 \end{figure} | 213 \end{figure} |
| 348 | 348 |
| 349 | 349 |
| 350 \subsubsection{Architectures} | 350 \subsubsection{Architectures} |
| 351 | 351 |
| 352 The ARM architecture family contains several revisions with capabilities and | 352 The ARM architecture family contains several revisions with capabilities and |
| 353 extensions (such as thumb-interworking, more vector registers, ...) | 353 extensions (such as thumb-interworking, more vector registers, ...) |
| 354 The following table sums up the most important properties of the various | 354 The following table sums up the most important properties of the various |
| 355 architecture standards, from a calling convention perspective. | 355 architecture standards, from a calling convention perspective. |
| 356 | 356 |
| 357 % iPhone 3GS : ARM Cortex-A8 | 357 % iPhone 3GS : ARM Cortex-A8 |
| 358 % Nintendo DS: ARM 7 and ARM 9 | 358 % Nintendo DS: ARM 7 and ARM 9 |
| 359 % ARM 7: ARMv4T | 359 % ARM 7: ARMv4T |
| 366 \hline | 366 \hline |
| 367 ARMv4 & & \\ | 367 ARMv4 & & \\ |
| 368 ARMv4T & ARM 7, ARM 9, Neo FreeRunner (OpenMoko) & \\ | 368 ARMv4T & ARM 7, ARM 9, Neo FreeRunner (OpenMoko) & \\ |
| 369 ARMv5 & ARM 9E & BLX instruction available \\ | 369 ARMv5 & ARM 9E & BLX instruction available \\ |
| 370 ARMv6 & & No vector registers available in thumb \\ | 370 ARMv6 & & No vector registers available in thumb \\ |
| 371 ARMv7 & iPod touch, iPhone 3GS/4, Raspberry Pi 2 & VFP throughout available, armhf calling convention on some platforms \\ | 371 ARMv7 & iPod touch, iPhone 3GS/4, Raspberry Pi 2 & VFP throughout available, armhf calling convention on some platforms \\ |
| 372 ARMv8 & iPhone 6 and higher & 64bit support \\ | 372 ARMv8 & iPhone 6 and higher & 64bit support \\ |
| 373 \end{tabular*} | 373 \end{tabular*} |
| 374 \caption{Overview of ARM Architecture, Platforms and Details} | 374 \caption{Overview of ARM Architecture, Platforms and Details} |
| 375 \end{table} | 375 \end{table} |
| 376 | 376 |
| 377 \newpage | 377 \newpage |