Mercurial > pub > dyncall > dyncall
comparison dyncall/dyncall_call_arm32_thumb_armhf.S @ 0:3e629dc19168
initial from svn dyncall-1745
author | Daniel Adler |
---|---|
date | Thu, 19 Mar 2015 22:24:28 +0100 |
parents | |
children | 93f315f02a32 |
comparison
equal
deleted
inserted
replaced
-1:000000000000 | 0:3e629dc19168 |
---|---|
1 /* | |
2 | |
3 Package: dyncall | |
4 Library: dyncall | |
5 File: dyncall/dyncall_call_arm32_thumb_armhf.S | |
6 Description: Call Kernel for ARM 32-bit ARM Architecture - Hard Float in Thumb code | |
7 License: | |
8 | |
9 Copyright (c) 2007-2015 Daniel Adler <dadler@uni-goettingen.de>, | |
10 Tassilo Philipp <tphilipp@potion-studios.com> | |
11 | |
12 Permission to use, copy, modify, and distribute this software for any | |
13 purpose with or without fee is hereby granted, provided that the above | |
14 copyright notice and this permission notice appear in all copies. | |
15 | |
16 THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
17 WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
18 MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
19 ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
20 WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
21 ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
22 OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
23 | |
24 */ | |
25 | |
26 | |
27 | |
28 #include "../portasm/portasm-arm.S" | |
29 | |
30 /* ============================================================================ | |
31 DynCall Call Kernel for ARM 32-bit ARM Architecture Hard-Float | |
32 ---------------------------------------------------------------------------- | |
33 C Interface: | |
34 dcCall_arm32_armhf (DCpointer target, DCpointer argv, DCsize size, DCfloat* regdata); | |
35 | |
36 This Call Kernel was tested on Raspberry Pi/Raspbian (Debian) | |
37 */ | |
38 | |
39 .text | |
40 .thumb | |
41 #ifndef __thumb2__ | |
42 .code 16 | |
43 #endif | |
44 // .arch armv6 | |
45 // .fpu vfp | |
46 | |
47 GLOBAL_C(dcCall_arm32_armhf) | |
48 .thumb_func | |
49 ENTRY_C(dcCall_arm32_armhf) | |
50 | |
51 /* Prolog. This function never needs to spill inside its prolog, so just store the permanent registers. */ | |
52 | |
53 // mov r12 , r13 /* Stack ptr (r13) -> temporary (r12). */ | |
54 // stmdb r13!, {r4-r5, r11, r12, r14} /* Permanent registers and stack pointer (now in r12), etc... -> save area on stack (except counter). */ | |
55 | |
56 //mov r11 , r12 /* Set frame ptr. */ | |
57 | |
58 push {r4-r7, r14} | |
59 mov r7 , r13 | |
60 | |
61 mov r4 , r0 /* r4 = 'fptr' (1st argument is passed in r0). */ | |
62 mov r5 , r1 /* r5 = 'args' (2nd argument is passed in r1). */ | |
63 | |
64 /* Load 16 single-precision registers (= 8 double-precision registers). */ | |
65 flds s0, [r3,#0 ] | |
66 flds s1, [r3,#4 ] | |
67 flds s2, [r3,#8 ] | |
68 flds s3, [r3,#12] | |
69 flds s4, [r3,#16] | |
70 flds s5, [r3,#20] | |
71 flds s6, [r3,#24] | |
72 flds s7, [r3,#28] | |
73 flds s8, [r3,#32] | |
74 flds s9, [r3,#36] | |
75 flds s10, [r3,#40] | |
76 flds s11, [r3,#44] | |
77 flds s12, [r3,#48] | |
78 flds s13, [r3,#52] | |
79 flds s14, [r3,#56] | |
80 flds s15, [r3,#60] | |
81 | |
82 sub r2 , #16 | |
83 cmp r2, #0 | |
84 ble armhf_call | |
85 | |
86 | |
87 // sub r13, r13, r2 | |
88 // and r13, #-8 /* align 8-byte. */ | |
89 | |
90 mov r6, r13 | |
91 sub r6 , r2 | |
92 // mov r3 , #8 | |
93 // neg r3 , r3 | |
94 // and r6 , r3 | |
95 lsr r6 , #3 | |
96 lsl r6 , #3 | |
97 mov r13, r6 | |
98 | |
99 mov r3, #0 /* Init byte counter. */ | |
100 add r1 , #16 | |
101 armhf_pushArgs: | |
102 ldr r0, [r1, +r3] /* Load word into r0. */ | |
103 // str r0, [r13, +r3] /* Push word onto stack. */ | |
104 str r0, [r6, +r3] /* Push word onto stack. */ | |
105 add r3, #4 /* Increment byte counter. */ | |
106 cmp r2, r3 | |
107 bne armhf_pushArgs | |
108 | |
109 armhf_call: | |
110 ldmia r5!, {r0-r3} /* Load first 4 arguments for new call into r0-r3. */ | |
111 /* 'blx %r4' workaround for ARMv4t: */ | |
112 // mov r14, r15 /* Branch return address(r15) -> link register (r14) -- r15 always points to address of current + 2 instructions (= Epilog code). */ | |
113 mov r6, r15 | |
114 add r6, #5 | |
115 mov r14, r6 | |
116 bx r4 /* Call (ARM/THUMB), available for ARMv4t. */ | |
117 | |
118 /* Epilog. */ | |
119 // ldmdb r11, {r4-r5, r11, r13, r15} /* Restore permanent registers (ignore temporary (r12), restore stack ptr and program counter).@@@db not needed since we rewrite r13? */ | |
120 mov r13, r7 | |
121 pop {r4-r7, r15} | |
122 |