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1 %//////////////////////////////////////////////////////////////////////////////
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2 %
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3 % Copyright (c) 2007,2009 Daniel Adler <dadler@uni-goettingen.de>,
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4 % Tassilo Philipp <tphilipp@potion-studios.com>
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5 %
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6 % Permission to use, copy, modify, and distribute this software for any
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7 % purpose with or without fee is hereby granted, provided that the above
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8 % copyright notice and this permission notice appear in all copies.
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9 %
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10 % THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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11 % WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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12 % MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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13 % ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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14 % WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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15 % ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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16 % OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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17 %
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18 %//////////////////////////////////////////////////////////////////////////////
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19
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20 % ==================================================
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21 % x64
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22 % ==================================================
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23 \subsection{x64 Calling Convention}
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24
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25
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26 \paragraph{Overview}
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27
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28 The x64 (64bit) architecture designed by AMD is based on Intel's x86 (32bit)
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29 architecture, supporting it natively. It is sometimes referred to as x86-64,
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30 AMD64, or, cloned by Intel, EM64T or Intel64.\\
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31 On this processor, a word is defined to be 16 bits in size, a dword 32 bits
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32 and a qword 64 bits. Note that this is due to historical reasons (terminology
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33 didn't change with the introduction of 32 and 64 bit processors).\\
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34 The x64 calling convention for MS Windows \cite{x64Win} differs from the
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35 SystemV x64 calling convention \cite{x64SysV} used by Linux/*BSD/...
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36 Note that this is not the only difference between these operating systems. The
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37 64 bit programming model in use by 64 bit windows is LLP64, meaning that the C
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38 types int and long remain 32 bits in size, whereas long long becomes 64 bits.
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39 Under Linux/*BSD/... it's LP64.\\
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40 \\
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41 Compared to the x86 architecture, the 64 bit versions of the registers are
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42 called rax, rbx, etc.. Furthermore, there are eight new general purpose
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95
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43 registers r8-r15.\\
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44
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45
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46
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47 \paragraph{\product{dyncall} support}
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48
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49 \product{dyncall} supports the MS Windows and System V calling convention.\\
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50 \\
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51
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52
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53
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54 \subsubsection{MS Windows}
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55
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56 \paragraph{Registers and register usage}
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57
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58 \begin{table}[h]
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77
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59 \begin{tabular*}{0.95\textwidth}{3 B}
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60 Name & Brief description\\
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61 \hline
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62 {\bf rax} & scratch, return value\\
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63 {\bf rbx} & permanent\\
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64 {\bf rcx} & scratch, parameter 0 if integer or pointer\\
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65 {\bf rdx} & scratch, parameter 1 if integer or pointer\\
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66 {\bf rdi} & permanent\\
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67 {\bf rsi} & permanent\\
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68 {\bf rbp} & permanent, may be used ase frame pointer\\
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69 {\bf rsp} & stack pointer\\
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70 {\bf r8-r9} & scratch, parameter 2 and 3 if integer or pointer\\
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71 {\bf r10-r11} & scratch, permanent if required by caller (used for syscall/sysret)\\
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72 {\bf r12-r15} & permanent\\
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73 {\bf xmm0} & scratch, floating point parameter 0, floating point return value\\
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74 {\bf xmm1-xmm3} & scratch, floating point parameters 1-3\\
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75 {\bf xmm4-xmm5} & scratch, permanent if required by caller\\
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76 {\bf xmm6-xmm15} & permanent\\
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76
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77 \end{tabular*}
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78 \caption{Register usage on x64 MS Windows platform}
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79 \end{table}
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80
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81 \paragraph{Parameter passing}
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82
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83 \begin{itemize}
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84 \item stack parameter order: right-to-left
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85 \item caller cleans up the stack
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86 \item first 4 integer/pointer parameters are passed via rcx, rdx, r8, r9 (from left to right), others are pushed on stack (there is a
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87 preserve area for the first 4)
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88 \item float and double parameters are passed via xmm0l-xmm3l
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89 \item first 4 parameters are passed via the correct register depending on the parameter type - with mixed float and int parameters,
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90 some registers are left out (e.g. first parameter ends up in rcx or xmm0, second in rdx or xmm1, etc.)
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91 \item parameters in registers are right justified
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92 \item parameters \textless\ 64bits are not zero extended - zero the upper bits contiaining garbage if needed (but they are always
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93 passed as a qword)
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94 \item parameters \textgreater\ 64 bit are passed by reference
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95 \item if callee takes address of a parameter, first 4 parameters must be dumped (to the reserved space on the stack) - for
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96 floating point parameters, value must be stored in integer AND floating point register
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97 \item caller cleans up the stack, not the callee (like cdecl)
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98 \item stack is always 16byte aligned - since return address is 64 bits in size, stacks with an odd number of parameters are
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99 already aligned
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100 \item ellipsis calls take floating point values in int and float registers (single precision floats are promoted to double precision
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101 as defined for ellipsis calls)
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102 \item if size of parameters \textgreater\ 1 page of memory (usually between 4k and 64k), chkstk must be called
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103 \end{itemize}
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104
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105
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106 \paragraph{Return values}
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107
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108 \begin{itemize}
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109 \item return values of pointer or integral type (\textless=\ 64 bits) are returned via the rax register
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110 \item floating point types are returned via the xmm0 register
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111 \item for types \textgreater\ 64 bits, a secret first parameter with an address to the return value is passed
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112 \end{itemize}
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113
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114
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115 \paragraph{Stack layout}
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116
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117 Stack frame is always 16-byte aligned. Stack directly after function prolog:\\
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118
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119 \begin{figure}[h]
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120 \begin{tabular}{5|3|1 1}
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121 \hhline{~-~~}
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92
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122 & \vdots & & \\
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123 \hhline{~=~~}
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124 local data & \hspace{4cm} & & \mrrbrace{9}{caller's frame} \\
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125 \hhline{~-~~}
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126 \mrlbrace{7}{parameter area} & \ldots & \mrrbrace{3}{stack parameters} & \\
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127 & \ldots & & \\
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128 & \ldots & & \\
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129 & r9 or xmm3 & \mrrbrace{4}{spill area} & \\
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130 & r8 or xmm2 & & \\
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131 & rdx or xmm1 & & \\
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132 & rcx or xmm0 & & \\
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133 \hhline{~-~~}
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134 & return address & & \\
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135 \hhline{~=~~}
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92
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136 local data & & & \mrrbrace{3}{current frame} \\
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137 \hhline{~-~~}
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138 parameter area & & & \\
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139 \hhline{~-~~}
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92
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140 & \vdots & & \\
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141 \hhline{~-~~}
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142 \end{tabular}
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143 \caption{Stack layout on x64 Microsoft platform}
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144 \end{figure}
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145
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146
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147
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148 \newpage
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149
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150 \subsubsection{System V (Linux / *BSD / MacOS X)}
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151
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152 \paragraph{Registers and register usage}
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153
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154 \begin{table}[h]
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155 \begin{tabular*}{0.95\textwidth}{3 B}
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156 Name & Brief description\\
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157 \hline
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158 {\bf rax} & scratch, return value\\
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159 {\bf rbx} & permanent\\
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160 {\bf rcx} & scratch, parameter 3 if integer or pointer\\
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161 {\bf rdx} & scratch, parameter 2 if integer or pointer, return value\\
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162 {\bf rdi} & scratch, parameter 0 if integer or pointer\\
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163 {\bf rsi} & scratch, parameter 1 if integer or pointer\\
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164 {\bf rbp} & permanent, may be used ase frame pointer\\
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165 {\bf rsp} & stack pointer\\
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166 {\bf r8-r9} & scratch, parameter 4 and 5 if integer or pointer\\
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167 {\bf r10-r11} & scratch\\
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168 {\bf r12-r15} & permanent\\
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169 {\bf xmm0} & scratch, floating point parameters 0, floating point return value\\
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170 {\bf xmm1-xmm7} & scratch, floating point parameters 1-7\\
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171 {\bf xmm8-xmm15} & scratch\\
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172 {\bf st0-st1} & scratch, 16 byte floating point return value\\
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173 {\bf st2-st7} & scratch\\
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76
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174 \end{tabular*}
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175 \caption{Register usage on x64 System V (Linux/*BSD)}
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176 \end{table}
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177
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178 \paragraph{Parameter passing}
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179
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180 \begin{itemize}
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181 \item stack parameter order: right-to-left
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182 \item caller cleans up the stack
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183 \item first 6 integer/pointer parameters are passed via rdi, rsi, rdx, rcx, r8, r9
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184 \item first 8 floating point parameters \textless=\ 64 bits are passed via xmm0l-xmm7l
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185 \item parameters in registers are right justified
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186 \item parameters that are not passed via registers are pushed onto the stack
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187 \item parameters \textless\ 64bits are not zero extended - zero the upper bits contiaining garbage if needed (but they are always
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188 passed as a qword)
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189 \item integer/pointer parameters \textgreater\ 64 bit are passed via 2 registers
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190 \item if callee takes address of a parameter, number of used xmm registers is passed silently in al (passed number mustn't be
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191 exact but an upper bound on the number of used xmm registers)
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192 \item stack is always 16byte aligned - since return address is 64 bits in size, stacks with an odd number of parameters are
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193 already aligned
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194 \end{itemize}
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195
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196
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197 \paragraph{Return values}
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198
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199 \begin{itemize}
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200 \item return values of pointer or integral type (\textless=\ 64 bits) are returned via the rax register
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201 \item floating point types are returned via the xmm0 register
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202 \item for types \textgreater\ 64 bits, a secret first parameter with an address to the return value is passed - the passed in address
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203 will be returned in rax
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204 \item floating point values \textgreater\ 64 bits are returned via st0 and st1
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205 \end{itemize}
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206
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207
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208 \paragraph{Stack layout}
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209
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210 Stack frame is always 16-byte aligned. Note that there is no spill area.
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211 Stack directly after function prolog:\\
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212
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213 \begin{figure}[h]
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214 \begin{tabular}{5|3|1 1}
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215 \hhline{~-~~}
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216 & \vdots & & \\
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217 \hhline{~=~~}
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218 local data & \hspace{4cm} & & \mrrbrace{5}{caller's frame} \\
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219 \hhline{~-~~}
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220 \mrlbrace{3}{parameter area} & \ldots & \mrrbrace{3}{stack parameters} & \\
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221 & \ldots & & \\
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222 & \ldots & & \\
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223 \hhline{~-~~}
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224 & return address & & \\
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225 \hhline{~=~~}
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226 local data & & & \mrrbrace{3}{current frame} \\
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227 \hhline{~-~~}
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228 parameter area & & & \\
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229 \hhline{~-~~}
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230 & \vdots & & \\
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231 \hhline{~-~~}
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232 \end{tabular}
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233 \caption{Stack layout on x64 System V (Linux/*BSD)}
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234 \end{figure}
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235
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