--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/R/rdyncall/inst/dynports/cuda.R	Thu Mar 19 22:26:28 2015 +0100
@@ -0,0 +1,175 @@
+dynbind("cuda", "
+cuArray3DCreate(**<CUarray_st>*<CUDA_ARRAY3D_DESCRIPTOR>)i;
+cuArray3DGetDescriptor(*<CUDA_ARRAY3D_DESCRIPTOR>*<CUarray_st>)i;
+cuArrayCreate(**<CUarray_st>*<CUDA_ARRAY_DESCRIPTOR>)i;
+cuArrayDestroy(*<CUarray_st>)i;
+cuArrayGetDescriptor(*<CUDA_ARRAY_DESCRIPTOR>*<CUarray_st>)i;
+cuCtxAttach(**<CUctx_st>I)i;
+cuCtxCreate(**<CUctx_st>Ii)i;
+cuCtxDestroy(*<CUctx_st>)i;
+cuCtxDetach(*<CUctx_st>)i;
+cuCtxGetDevice(*i)i;
+cuCtxPopCurrent(**<CUctx_st>)i;
+cuCtxPushCurrent(*<CUctx_st>)i;
+cuCtxSynchronize()i;
+cuDeviceComputeCapability(*i*ii)i;
+cuDeviceGet(*ii)i;
+cuDeviceGetAttribute(*iii)i;
+cuDeviceGetCount(*i)i;
+cuDeviceGetName(*cii)i;
+cuDeviceGetProperties(*<CUdevprop_st>i)i;
+cuDeviceTotalMem(*Ii)i;
+cuEventCreate(**<CUevent_st>I)i;
+cuEventDestroy(*<CUevent_st>)i;
+cuEventElapsedTime(*f*<CUevent_st>*<CUevent_st>)i;
+cuEventQuery(*<CUevent_st>)i;
+cuEventRecord(*<CUevent_st>*<CUstream_st>)i;
+cuEventSynchronize(*<CUevent_st>)i;
+cuFuncSetBlockShape(*<CUfunc_st>iii)i;
+cuFuncSetSharedSize(*<CUfunc_st>I)i;
+cuInit(I)i;
+cuLaunch(*<CUfunc_st>)i;
+cuLaunchGrid(*<CUfunc_st>ii)i;
+cuLaunchGridAsync(*<CUfunc_st>ii*<CUstream_st>)i;
+cuMemAlloc(*II)i;
+cuMemAllocHost(**vI)i;
+cuMemAllocPitch(*I*IIII)i;
+cuMemFree(I)i;
+cuMemFreeHost(*v)i;
+cuMemGetAddressRange(*I*II)i;
+cuMemGetInfo(*I*I)i;
+cuMemcpy2D(*<CUDA_MEMCPY2D_st>)i;
+cuMemcpy2DAsync(*<CUDA_MEMCPY2D_st>*<CUstream_st>)i;
+cuMemcpy2DUnaligned(*<CUDA_MEMCPY2D_st>)i;
+cuMemcpy3D(*<CUDA_MEMCPY3D_st>)i;
+cuMemcpy3DAsync(*<CUDA_MEMCPY3D_st>*<CUstream_st>)i;
+cuMemcpyAtoA(*<CUarray_st>I*<CUarray_st>II)i;
+cuMemcpyAtoD(I*<CUarray_st>II)i;
+cuMemcpyAtoH(*v*<CUarray_st>II)i;
+cuMemcpyAtoHAsync(*v*<CUarray_st>II*<CUstream_st>)i;
+cuMemcpyDtoA(*<CUarray_st>III)i;
+cuMemcpyDtoD(III)i;
+cuMemcpyDtoH(*vII)i;
+cuMemcpyDtoHAsync(*vII*<CUstream_st>)i;
+cuMemcpyHtoA(*<CUarray_st>I*vI)i;
+cuMemcpyHtoAAsync(*<CUarray_st>I*vI*<CUstream_st>)i;
+cuMemcpyHtoD(I*vI)i;
+cuMemcpyHtoDAsync(I*vI*<CUstream_st>)i;
+cuMemsetD16(ISI)i;
+cuMemsetD2D16(IISII)i;
+cuMemsetD2D32(IIIII)i;
+cuMemsetD2D8(IICII)i;
+cuMemsetD32(III)i;
+cuMemsetD8(ICI)i;
+cuModuleGetFunction(**<CUfunc_st>*<CUmod_st>*c)i;
+cuModuleGetGlobal(*I*I*<CUmod_st>*c)i;
+cuModuleGetTexRef(**<CUtexref_st>*<CUmod_st>*c)i;
+cuModuleLoad(**<CUmod_st>*c)i;
+cuModuleLoadData(**<CUmod_st>*v)i;
+cuModuleLoadFatBinary(**<CUmod_st>*v)i;
+cuModuleUnload(*<CUmod_st>)i;
+cuParamSetSize(*<CUfunc_st>I)i;
+cuParamSetTexRef(*<CUfunc_st>i*<CUtexref_st>)i;
+cuParamSetf(*<CUfunc_st>if)i;
+cuParamSeti(*<CUfunc_st>iI)i;
+cuParamSetv(*<CUfunc_st>i*vI)i;
+cuStreamCreate(**<CUstream_st>I)i;
+cuStreamDestroy(*<CUstream_st>)i;
+cuStreamQuery(*<CUstream_st>)i;
+cuStreamSynchronize(*<CUstream_st>)i;
+cuTexRefCreate(**<CUtexref_st>)i;
+cuTexRefDestroy(*<CUtexref_st>)i;
+cuTexRefGetAddress(*I*<CUtexref_st>)i;
+cuTexRefGetAddressMode(*p*<CUtexref_st>i)i;
+cuTexRefGetArray(**<CUarray_st>*<CUtexref_st>)i;
+cuTexRefGetFilterMode(*p*<CUtexref_st>)i;
+cuTexRefGetFlags(*I*<CUtexref_st>)i;
+cuTexRefGetFormat(*p*i*<CUtexref_st>)i;
+cuTexRefSetAddress(*I*<CUtexref_st>II)i;
+cuTexRefSetAddressMode(*<CUtexref_st>ii)i;
+cuTexRefSetArray(*<CUtexref_st>*<CUarray_st>I)i;
+cuTexRefSetFilterMode(*<CUtexref_st>i)i;
+cuTexRefSetFlags(*<CUtexref_st>I)i;
+cuTexRefSetFormat(*<CUtexref_st>ii)i;
+")
+
+# CUdevprop_st{i[2]i[2]iiiiiiii}maxThreadsPerBlock maxThreadsDim maxGridSize sharedMemPerBlock totalConstantMemory SIMDWidth memPitch regsPerBlock clockRate textureAlign ;
+parseStructInfos("
+CUDA_MEMCPY2D_st{IIi*vI*<CUarray_st>IIIi*vI*<CUarray_st>III}srcXInBytes srcY srcMemoryType srcHost srcDevice srcArray srcPitch dstXInBytes dstY dstMemoryType dstHost dstDevice dstArray dstPitch WidthInBytes Height ;
+CUDA_MEMCPY3D_st{IIIIi*vI*<CUarray_st>*vIIIIIIi*vI*<CUarray_st>*vIIIII}srcXInBytes srcY srcZ srcLOD srcMemoryType srcHost srcDevice srcArray reserved0 srcPitch srcHeight dstXInBytes dstY dstZ dstLOD dstMemoryType dstHost dstDevice dstArray reserved1 dstPitch dstHeight WidthInBytes Height Depth ;
+CUarray_st{};
+CUfunc_st{};
+CUevent_st{};
+CUDA_ARRAY_DESCRIPTOR{IIiI}Width Height Format NumChannels ;
+CUDA_ARRAY3D_DESCRIPTOR{IIIiII}Width Height Depth Format NumChannels Flags ;
+CUtexref_st{};
+CUctx_st{};
+CUstream_st{};
+CUmod_st{};
+")
+CUDA_ERROR_ALREADY_ACQUIRED=210;
+CUDA_ERROR_ALREADY_MAPPED=208;
+CUDA_ERROR_ARRAY_IS_MAPPED=207;
+CUDA_ERROR_CONTEXT_ALREADY_CURRENT=202;
+CUDA_ERROR_DEINITIALIZED=4;
+CUDA_ERROR_FILE_NOT_FOUND=301;
+CUDA_ERROR_INVALID_CONTEXT=201;
+CUDA_ERROR_INVALID_DEVICE=101;
+CUDA_ERROR_INVALID_HANDLE=400;
+CUDA_ERROR_INVALID_IMAGE=200;
+CUDA_ERROR_INVALID_SOURCE=300;
+CUDA_ERROR_INVALID_VALUE=1;
+CUDA_ERROR_LAUNCH_FAILED=700;
+CUDA_ERROR_LAUNCH_INCOMPATIBLE_TEXTURING=703;
+CUDA_ERROR_LAUNCH_OUT_OF_RESOURCES=701;
+CUDA_ERROR_LAUNCH_TIMEOUT=702;
+CUDA_ERROR_MAP_FAILED=205;
+CUDA_ERROR_NOT_FOUND=500;
+CUDA_ERROR_NOT_INITIALIZED=3;
+CUDA_ERROR_NOT_MAPPED=211;
+CUDA_ERROR_NOT_READY=600;
+CUDA_ERROR_NO_BINARY_FOR_GPU=209;
+CUDA_ERROR_NO_DEVICE=100;
+CUDA_ERROR_OUT_OF_MEMORY=2;
+CUDA_ERROR_UNKNOWN=999;
+CUDA_ERROR_UNMAP_FAILED=206;
+CUDA_SUCCESS=0;
+CU_AD_FORMAT_FLOAT=32;
+CU_AD_FORMAT_HALF=16;
+CU_AD_FORMAT_SIGNED_INT16=9;
+CU_AD_FORMAT_SIGNED_INT32=10;
+CU_AD_FORMAT_SIGNED_INT8=8;
+CU_AD_FORMAT_UNSIGNED_INT16=2;
+CU_AD_FORMAT_UNSIGNED_INT32=3;
+CU_AD_FORMAT_UNSIGNED_INT8=1;
+CU_CTX_FLAGS_MASK=3;
+CU_CTX_SCHED_AUTO=0;
+CU_CTX_SCHED_MASK=3;
+CU_CTX_SCHED_SPIN=1;
+CU_CTX_SCHED_YIELD=2;
+CU_DEVICE_ATTRIBUTE_CLOCK_RATE=13;
+CU_DEVICE_ATTRIBUTE_GPU_OVERLAP=15;
+CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_X=2;
+CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_Y=3;
+CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_Z=4;
+CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_X=5;
+CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_Y=6;
+CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_Z=7;
+CU_DEVICE_ATTRIBUTE_MAX_PITCH=11;
+CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_BLOCK=12;
+CU_DEVICE_ATTRIBUTE_MAX_SHARED_MEMORY_PER_BLOCK=8;
+CU_DEVICE_ATTRIBUTE_MAX_THREADS_PER_BLOCK=1;
+CU_DEVICE_ATTRIBUTE_MULTIPROCESSOR_COUNT=16;
+CU_DEVICE_ATTRIBUTE_REGISTERS_PER_BLOCK=12;
+CU_DEVICE_ATTRIBUTE_SHARED_MEMORY_PER_BLOCK=8;
+CU_DEVICE_ATTRIBUTE_TEXTURE_ALIGNMENT=14;
+CU_DEVICE_ATTRIBUTE_TOTAL_CONSTANT_MEMORY=9;
+CU_DEVICE_ATTRIBUTE_WARP_SIZE=10;
+CU_MEMORYTYPE_ARRAY=3;
+CU_MEMORYTYPE_DEVICE=2;
+CU_MEMORYTYPE_HOST=1;
+CU_TR_ADDRESS_MODE_CLAMP=1;
+CU_TR_ADDRESS_MODE_MIRROR=2;
+CU_TR_ADDRESS_MODE_WRAP=0;
+CU_TR_FILTER_MODE_LINEAR=1;
+CU_TR_FILTER_MODE_POINT=0;